Previous Page  38 / 58 Next Page
Information
Show Menu
Previous Page 38 / 58 Next Page
Page Background

edfas.org

ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 19 NO. 1

38

screen is painted with black-and-white pixels to highlight

potential circuit issues and their physical location in the

field of view. An example was shown where normal laser

voltage imaging could not be used due to the low duty

cycle. Instead, the LVT technique was used to visually

signal anomalies. Further root-cause analysis required

tracing the circuit with normal laser voltage probing (LVP).

The minimum gate time is 500 ps, but it is dependent on

the type of signal being probed. The hardware upgrade

adds a new box to the system but does not require a new

rack. The highest bandwidth for the current LVT system

is 450 MHz.

The next presentation, given by Dr. Ramya Yeluri of

Intel Corp., was entitled “Use of Second Harmonic and

Thermal Effects of Laser Voltage Probing.” Dr. Yeluri pre-

sented the background for LVP, stating how an incident

beam, through the backside of silicon, is modulated and

realized in the reflected beam. This change is produced

by the difference in reflectivity with respect to time.

Free-carrier density change is the dominant effect, while

electroabsorption at the active junction is a secondary

effect. It is not possible to separate the effect of gate and

drain spatially on current technologies, due to the small,

compact geometries relative to the laser spot size. All peri-

odic signals can be expressed as a sumof sine and cosine

functions. Perfect squarewaves have odd harmonics only,

so second harmonics can detect deviations (such as a

missing bit, badduty cycle, or bad slew rate). The first case

study included a distorted duty-cycle clock. Typically, the

duty cyclewould need to bemeasured by probing at each

location along a suspected path, but the use of frequency

mapping at the second harmonic enabled detection of

duty-cycle distortion without requiring probing for each

node separately. The second case study demonstrated

how thermal effects can be detected with LVP. For this

case, there was an ohmic short to

V

SS

, which caused con-

tention on the output pMOS of an inverter. While probing

the inverter, the observed amplitude was much higher,

due to the thermal effect. These techniques can be used

with the existing infrared tools and provide for efficiency

improvements in debug cases.

All three presentations were well received, with many

follow-up discussions and questions and answers. Each

of the presentations was tied to either innovations or

efficient use of the existing optical probe tools in today’s

IC semiconductor industrial complex. The content showed

that innovations by both original equipment manufactur-

ers and the customer were still very robust and that future

potential ones exist. Approximately 55personnel attended

the Contactless Fault IsolationUser Groupmeeting, which

was sponsored by Checkpoint Technologies.

ISTFA 2016 FIB USER GROUP

Moderators: Steven Herschbein, Globalfoundries, and Michael Wong, Intel Corp.

steven.herschbein@globalfoundries.com michael.wong@intel.com

F

ocused ion beam (FIB)-driven sample-preparation

techniques, failure analysis methods, chip circuit

modification/editing, and improved tools continue

to be popular topics at ISTFA. This year, the FIB User

Group was held Thursday afternoon, at the very end of

the conference. Despite the late time, the gathering was

well attended, with a peak attendance of approximately

60 people. Many familiar faces from the failure analysis,

design debug, and materials community along with tool

vendors joined us for light refreshments and stimulating

discussion. Six presentations covered a wide range of

topics, including a survey of conventional as well as novel

conductive polymer coatings used in capping and charge

control; two papers covering the advances andmechanics

of slicing, harvesting, and imaging scanning/transmission

electron microscope (S/TEM) lamellae; the feasibility of

producing an FIB-SEMcluster tool for advanced analytics;

and a circuit edit example that used capacitance rather

than resistance for controlled delay. The organizers also

wish to thank Thermo Fisher Scientific for its sponsorship.

The session’s first speaker was Bryan Tracy of EAG

Laboratories, who presented “Capping and Coatings

for FIB XTEM.” Bryan’s background is in SEM and TEM,

and success in these endeavors is highly dependent on

selection of the right protective coating for the applica-

tion, to deal with charge control and milling artifacts. He

listed multiple key requirements for a good cap, which

included the avoidance of nano-waterfall streaks, pro-

tecting the surface from e-beam and ion beam damage,

understanding specific cap chemical avoidance when