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ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 18 NO. 2
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HOW TO DO FAILURE ANALYSIS
FOR STRESS CRACKS
David Burgess, Accelerated Analysis
INTRODUCTION
Failure analysis is all about finding pertinent questions
with meaningful answers.
How do you do failure analysis for stress cracks? This
is, of course, a dumbquestion. The obvious simple answer
is: you don’t. You don’t know stress cracks are the cause
of a failure before the analysis is done.
The simple answer is correct but not helpful. Dumb
questions often point to valid and real questions. In this
case, a real question is: “If stress cracks were the cause of
a failure, how can that conclusion be discovered and sup-
ported?” That is a good question and an important one.
Chances are that the correct conclusion will be missed or
delayed unless the analyst is familiar with the physics and
history of stress voids in integrated circuits (ICs). Without
a firm concept of mechanical stress in ICs and IC packag-
ing, many failure mechanisms may not be recognized or
appreciated until later ... maybe too much later.
New metallization systems have largely replaced the
aluminum and aluminum/silicon conductors that were
commonplace in the examples that follow. The stress
void mechanism described remains important in today’s
most advancedmetal systems. In fact, stress inmetalliza-
tionmay bemore critical because of reduced dimensions
and multiple metal layers. We’re engineering around the
problem, but the stress is still there andmay be amecha-
nism that can “bite” us again if we’re not vigilant.
BACKGROUND
Stress cracks, or stress voiding, in IC metallization
were not a problem until 1980. Electromigration was
a major focus. However, metal opens were occurring
in high-temperature operating life, after temperature
cycle, and after time in room-temperature storage. Opens
were found immediately after wafer processing. Clearly,
electromigration could not be the cause of failures after
unbiased storage.
Stress crackswere found inproducts frommanufactur-
ers worldwide. Attempts to screen out potential failures
were not successful. The failure rate due to stress voiding
(or “creep”) seemed to increase with time. That is, stress
voidingwas awearoutmechanismthat startedat time zero.
BASIC CAUSE OF STRESS CRACKS
Aluminum has a coefficient of thermal expansion
(CTE) of 26 × 10−6/°C. The CTEs of SiO2 and silicon are
approximately 0.5 × 10−6 /°C and 3.5 × 10 −6/°C, respec-
tively. Deposited aluminum adheres well to SiO 2. Good
adherence to SiO2 is necessary for IC manufacture, but
adherence results in mechanical stress in a deposited
aluminumfilm. Aluminumwas deposited at elevated tem-
peratures near 300 °C. When cooled to roomtemperature,
aluminum tended to shrink approximately 50 timesmore
than its SiO2 substrate. An unavoidable tensile stress is left
in the aluminumclose to the SiO2. The oxide stretches the
aluminum. The mechanical force tends to pull the alumi-
num apart. Note that while the aluminum is in tension,
the substrate oxide is in compression.
After metal deposition, the metal is patterned and
subsequently covered with a passivation layer, with the
wafer heated to approximately 400 °C for passivation
deposition. As applied, the passivation layer is in compres-
sion. Aluminum lines become highly stressed by nitride
and oxide that encapsulate and restrict the metal on top,
bottom, and both sides. All of this creates more tensile
stress in the aluminum.
Although aluminum is a rather soft metal, it is also
brittle. Under tensile stress, a brittle material does not
stretch and elongate. Deposition variables such as the
addition of silicon or nitrogen can make the film more
brittle.[1] Stress voiding is made more severe for more
brittle metal.
Similarly, passivation films tend to be compressive.
Passivationmaterial and deposition details are as impor-
tant to stress voiding as the metal itself.[2]
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