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ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 18 NO. 1
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EDFAAO (2016) 1:4-12 1537-0755/$19.00 ©ASM International®
SILICON PIPELINE OR DISLOCATION DEFECT?
Yann Weber, Freescale Semiconducteurs France SAS
This article is based on the paper “Advanced Failure Analysis on Silicon Pipeline Defects and Dislocations in Mixed-Mode Devices” by Y.
Weber, J. Goxe, S. Alves, T. Zirilli, and M. Castignolles, Freescale Semiconducteurs France (Toulouse); S. Subramanian, Freescale Semi-
conductor Inc. (Austin, TX); Y. Tsang, Globalfoundries (formerly of Freescale USA); and K. Harber, TriQuint Semiconductor (formerly of
Freescale USA), which was presented at the 40th International Symposium for Testing and Failure Analysis (ISTFA), November 9-13, 2014
(Houston, TX).
INTRODUCTION
The study of dislocations in semiconductors paral-
lels the development of the electronics industry. These
silicon bulk defects commonly affect device technology
due tomany sources of variation fromphysical andmanu-
facturing processes.[1] Continual quality improvements
combined with constant economic pressure require a
reduction in the number of these defects, which result in
wafer fab manufacturing yield loss qualification failures
or customer returns. Upstream from this long-term goal,
the first requirement is to better understand and catego-
rize the defect’s effect in order to implement corrective
actions. In this strategy, the failure analysis (FA) process
must overcome traditional limits in terms of efficiency,
responsiveness, and the technical methods used. This
paper presents case studies of silicon pipeline defects
(called “pipeline”) anddislocations found onmixed-mode
technology. Pipeline defects are specific dislocations
that are widely reported to occur in CMOS and BiCMOS
devices[2,3] and recently in silicon-on-insulator devices; the
main distinction is that pipeline defects are considered to
connect the source and drain regions of an NMOS transis-
tor by diffusion of n-type dopants.
CHALLENGE OF DETECTING
PIPELINE DEFECTS
The two main concerns are the difficulty in screen-
ing out silicon crystallographic defects created during
wafer fab processing, and how to correctly perform
physical investigations to determine their nature. Several
authors[2,3] have reported this type of defect in semicon-
ductor devices, but there is no proposed methodology to
completeany FAworkand to separate thedifferent causes.
In this study, diversecomplementaryadvanced techniques
have been combined to highlight these unusual silicon
crystal defects. Startingwith electrical investigations, the
electrical impact of those latent defects causes parametric
or functional failures. Then, fault localization techniques
such as infrared, emissionmicroscopy (EMMI), or thermal
laser stimulation (TLS) help to identify the impacted
device and to localize defects; direct electrical measure-
ments using a nanoprobing atomic force probe (AFP)
determined the defective NMOS pattern fingers. Physical
analyses with various techniques, including physical
deprocessing and crystalline delineation etches, atomic
forcemicroscopy (AFM), scanningmicrowavemicroscopy
(SMM),[4,5] secondary electron microscopy (SEM), and
transmission electron microscopy (TEM) analyses, con-
tinued the inquiries. The combination of techniques, the
defect locations, and their physical signatures are key to
discriminating the difference between dislocation and
pipeline defects. Finally, the section “Discussion: Pipeline
or Dislocation” provides guidelines for distinguishing
dislocation and pipeline defects and deals with potential
wafer fab manufacturing processes that cause these two
types of defects.
FAILURE ELECTRICAL
CHARACTERIZATION METHODS
More than 14 case studies using identical 250 nm
mixed-mode devices on standard substrate have been
investigated to support the results presented. Different
failure modes (parametric or functional) impacted the
products at different steps of their lifetime. Customer
returns and yield-loss parts were explored. Then, com-
plementary physical investigations were performed.
The purpose of this cross-checking data is to determine
any influence of the nature of the physical defect and to
evaluate the physical analysis, allowing a distinction to be
realized with a high level of confidence. The parameters
are summarized in Table 1. These types of defects were
not limited to one specific element and were found in
various types of devices, such as electrostatic discharge