February_EDFA

edfas.org

ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 18 NO. 1

atmospheric pressure microwave-induced plasma (MIP)

decapsulation technique, using a focused plasma etching

approach, as a potential solution to the decapsulation

challenges on advanced IC packages. In his overview, he

spoke about the principle of the MIP decapsulation tool

and technique and its comparisonwith conventional O

-CF

plasma and acid decapsulation techniques. He presented

a few applications on complex ICs of different package

materials and stress treatments, such as thermally stressed

(high-temperature storage, temperature cycling, highly

accelerated stress test) silver and copper wire packages,

3-D stacked-dice packages after laser ablation, electrical-

overstress-damaged devices and packages, contaminated

dice, and so on.

“FOR TEM SAMPLE PREPARATION,

CONSISTENT QUALITY AND QUICK

TURNAROUND TIME ARE CRITICAL

CHALLENGES FOR DELIVERING A TIMELY

ROOT-CAUSE FA.”

from semiconductor manufacturers, industry suppliers,

universities, and national labs represented various sectors

in the FA community, demonstrating the key role sample

preparation has in any FA laboratory. This year’s session

was sponsored by Digit Concept.

Four technical presentations were followed by a

question-and-answer panel discussionwith five panelists.

Mr. Patrick Poirier of Digit Concept (Secqueville-en-Bessin,

France) joined the presenters to form the panel at this

year’s session.

For TEM sample preparation, consistent quality and

quick turnaround time are critical challenges for delivering

a timely root-causeFA. Inhispresentation“UpdatedSample

Preparation and STEM Workflows,” Dr. Stephan Kleindiek

of Kleindiek Nanotechnik spoke about solutions that could

helpmeet these challenges. He presented an updated TEM

sample-preparation and scanning TEM (STEM) imaging

workflow using a new loadlock-compatible, mouse-based

drag-and-drop in situ lift-out hardware/software (HW/SW)

tool. The lift-out tool contains a platform equipped with a

microgripper to contact the sample, a three-axis substage

system for moving the sample on the SEM stage, and a

TEM grid holder. A video showing the different functions

and capabilities of the lift-out shuttle HW/SW system was

also presented. The tool, coupledwith an SEM-compatible

glue, was used in lifting and transferring the TEM lamellae

to the TEM grid without the use of any ion-beam-assisted

deposition or milling process. The same stage also allows

sample rotation for inverted TEM sample preparation and

STEM imaging and characterization.

For complex IC packages, successful root-cause FA

dependsonvarious critical factors. One suchcritical factor is

the preservationof the original state of the “failures” during

the package decapsulation process. For plastic-packaged

ICs, the process must selectively remove the epoxy mold

compounds in a very reasonable time, preserving all the

bond wires, bond pads, dice, and, especially, the original

defect sites. The process is complicatedby the introduction

of new and advanced IC packaging with different materi-

als and package concepts, such as system-in-package, 3-D

stacked dice, GaAs, bond over active circuit, and copper

over anything. This creates the need for a decapsulation

tool that canhandle awide range of packages, aswell as the

need to develop processes that can preserve the integrity

of the original failure sites. These requirements present

critical challenges to the conventional plasma and acid

decapsulation techniques.

Dr. Jaiqi Tang of Jiaco Instruments B.V. presented “High-

Performance Decapsulation Technologies for Complex IC

Packages.” He explored the application of the oxygen-only

Sample preparation on defect-isolated samples is

crucial in yield improvement and technology develop-

ment. Due to limited failing devices, a high success rate is

paramount. After successful nondestructive isolation, an

effective sample-preparation technique that preserves the

integrity of the failing mode is required. With the decrease

in technology node size, increased functionality, and

2.5-D/3-Ddevicebuildup, conventional sample-preparation

methods are fast reaching their limitations.

Dr. Christian Schmidt of Globalfoundries presented

“Sample Preparation for Package FA on 14 nm and 20 nm

Technology.” He provided an overview and comparison of

current state-of-the-art sample-preparation methods and

techniques for fault-isolated target defects. He listed key

developments and challenges on packaged ICs that define

the changing toolsets andapproaches topackagedFA, from

the shrinking redistribution layer and higher connection

density affecting the die-to-die and die-to-substrate inter-

action to the increasing importance of different assembly

technologies, such as through-silicon via and copper pillar

contacts, the emergence of 2.5- and 3-D concepts into the

manufacturing process, and the effective nondestructive

fault isolation techniques, such as lock-in thermography,

electro-optical terahertz pulsed reflectometry, acoustic

microscopy, and so on. He named a few sample-prepara-

tionoptions, fromdicing tomechanical polishing toplasma

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