edfas.org
55
ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 18 NO. 3
Tescan, and Zeiss, have made significant progress in the
plasma FIB technique.
Real-time x-ray (RTX) inspection is a very common
and widely used FA technique for 2-D products; however,
it does not work well for 3-D geometries. Nanofocus and
microfocus 3-D RTX has been successfully applied to 3-D
TSVs. 3-D x-ray tomography with sufficient resolution (
X
,
Y
,
Z
), throughput, and price is necessary to enable routine
nondestructive inspection of critical defects at the assem-
bly site. How to improve the resolution and throughput is
a challenge for the 3-D RTX technique.
Time-domain reflectometry (TDR) has been success-
fully used to isolate open/short package-level failures.
With technology shifting to 3-D TSVs, conventional TDR
is reaching its resolution limits. Recently, a terahertz TDR
called electro-optical terahertz pulsed reflectometry
(EOTPR), with a promising resolution of <10 μm, was
applied to 2.5- and 3-D IC products. EOTPR has demon-
strated increased distance-to-defect accuracy. The key
factor in using EOTPR to isolate 3-D IC failures is setting
up full 3-D device-under-test modeling.
Conventional thermal emission techniques, such as
optical-beam-induced resistance change and thermal-
induced voltage alteration, are limited for isolating
package-level short failures due to vertical
Z
resolution.
Lock-in thermography (LIT) is a new technique that has
been developed for on-die defect localization through
homogeneous-covering package material. Moderate
lock-in frequencies (< 25 Hz) yielded sufficient layer reso-
lution in the vertical direction. The challenge of LIT for
2.5- and 3-D TSVs is setting up reference measurements.
Some failure analysis results suggest that increasing
LIT frequencies (>100 Hz) can obtain clear differentia-
tion of relevant layers and align measurement results
with theory calculation. Lock-in thermography as a new
technique can fulfill failure analysis requirements for the
3-D IC approach. Magnetic field imaging is another fault
isolation technique that has been applied to 2.5- and 3-D
TSVs. It usesmagnetic current imaging toallowcurrent 3-D
mapping and extraction of geometrical information about
current location at every chip level in a 3-D stack. Yet to be
resolved are the challenges of isolating silicon transistor
defects through the silicon backside to overcome interfer-
ences induced by 3-D TSVs and backsidemetallization for
conventional photon emissionmicroscopy, time-resolved
emission, and laser voltage probing techniques.
Last but not least, the challenge of using SAM for
2.5- and 3-D TSVs has been raised. It is very difficult for
acoustics to penetrate stacked thin dice withmixed inter-
connects and silicon vias. Conventional SAM resolution
XY
is approximately 25 µm, and penetration depth is approxi-
mately 0.1 µm. Currently, ongoing SAMdevelopment that
includes time-domain analysis, transducer development,
and higher power pulses to improve penetration depth
withhigh resolutionhas been achieved, and some of these
advancements have been applied to 2.5-DTSVs. However,
many challenges remain.
Collaboration is needed between academic insti-
tutes, industry, and equipment vendors to develop new
techniques and tools to meet 3-D IC failure analysis
requirements and to provide solutions for overcoming the
challenges of making 3-D stacked ICs a reality.
ABOUT THE AUTHOR
Lihong Cao
was a Senior Manager
at AdvancedMicroDevices, where she
was responsible for global package
failure analysis to support new
product and package development,
qualification, production, and cus-
tomer issues. She also was in charge
of new failure analysis technique development and the
roadmap for package failureanalysis. Dr. Cao specializes in
newpackage development, assembly, and failure analysis
for a variety of products. She received her Ph.D. inmateri-
als science and engineering. She has publishedmore than
100 technical papers and holds several U.S. patents.
Advertise in
Electronic Device Failure Analysis
magazine!
For information about advertising in
Electronic Device Failure Analysis
, contact Kelly Thomas, CEM.CMP,
National Account Manager; tel: 440.338.1733; fax: 614.948.3090;
e-mail:
kelly.thomas@asminternational.org.
Current rate card may be viewed online at asminternational.org/mediakit.