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ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 18 NO. 3
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ABOUT THE AUTHORS (continued)
B.L. Yeoh
graduated from the University of Technology, Malaysia, with a B.E. degree in electrical
engineering. In 2006, he joined Intel Microelectronics Malaysia as a failure analysis engineer, where
he specialized in memory testing and failure analysis during his five-year tenure. He is currently
employed as a Member of the Technical Staff at Globalfoundries Singapore. His field of interest
focuses on device fault isolation using a wide range of industry-standard electrical failure analysis
tools, such as photon emission microscopy and laser scanning microscopy techniques (OBIRCH,
TIVA, dynamic laser stimulation, etc.). His current research interests focus on exploring soft defect
localization and laser-assisted device alteration techniques for different failure-type diagnostics in
the semiconductor industry.
G.F. You
holds a B.S. degree in physics fromFuDanUniversity, China; anM.Eng. degree in electrical
engineering from Nanyang Technology University, Singapore; and a Ph.D. degree in the same field
from the National University of Singapore (NUS). Currently, he specializes inwafer-level tester-based
failure debug in Globalfoundries’ Product/Test and Yield Engineering Department, Singapore. His
experiences include dynamic fault isolation techniques, such as frequency mapping and soft failure
localization. Prior to joining Globalfoundries, Dr. You worked as a research fellow at NUS.
Y.H. Chan
graduated fromtheNational Universityof SingaporewithanM.Eng. inelectrical andelec-
tronic engineering. Hewas a test engineer with AMD from2005 to 2008 before joining Globalfoundries
as a diagnostic test lead. Mr. Chan has more than ten years of experience in semiconductor testing,
specializing in automated test equipment (ATE) and burn-in test solution development, implementa-
tion, and debug. He is very familiar with ATE test solution development on the Advantest, Teradyne,
and LTX family of testers, for both engineering sort testing and advanced coding methodologies for
dynamic electrical failure analysis applications. He is also a programmer familiar with C++ and VBA
coding. His current research interests focus on testmethodology optimization for test-time reduction
and multidimensional solution-search algorithms.
Zhao Lin
received her B.E. degree in electrical engineering from the National University of
Singapore in 2015. She then joined Globalfoundries’ Singapore Product/Test and Yield Engineering
Department as a test development engineer. She works on diagnostic testing and focuses on failure
characterizationwith various tester platforms, such as HP93K, TeradyneUflex and J750, andCredence
D-10. Ms. Lin is pursuing an M.S. degree with a specialization in nanoelectronics at the National
University of Singapore.
Jeffrey Lam
received his B.S. and M.S. degrees in chemical engineering from the University of
California Berkeley and the University of California Davis in 1979 and 1981, respectively. He obtained
a second M.S. degree in electrical engineering and computer science from the University of Santa
Clara in 1986. In 2014, he received his Ph.D. from the school of mathematics and physics at Nanyang
Technological University. Dr. Lam is currently a Vice President at Globalfoundries, Singapore, where
he is in charge of the Product/Test and Yield Engineering Department in Technology Development.
He possesses more than 35 years of experience in FA, design, product/yield engineering, and test
development. Dr. Lamhas 7 technical patents andmore than 20 publications. He has also been the chairman of the SEMI
SGP Product and Test Committee since 2009 and an adjunct associate professor at the National University of Singapore.
C.M. Chua
receivedhis Bachelor's andMaster's degrees inengineering fromtheNational University
of Singapore in 1988 and 1990, respectively. He is the Chief ExecutiveOfficer of Semicaps Corporation,
and his current responsibilities include overseeing the general operations of the companies within
the Semicaps Corporation Group.