November_EDFA_Digital ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 19 NO. 4 36 PLASMA FIB DEPROCESSING OF INTEGRATED CIRCUITS FROM THE BACKSIDE E.L. Principe 1 , Navid Asadizanjani 2 , Domenic Forte 2 , Mark Tehranipoor 2 , Robert Chivas 3 , Michael DiBattista 3 , and Scott Silverman 3 1 Synchrotron Research, Inc., Melbourne Beach, Fla. 2 Florida Institute for Cybersecurity, University of Florida, Gainesville, Fla. 3 Varioscale Inc., San Marcos, Calif. EDFAAO (2017) 4:36-44 1537-0755/$19.00 ©ASM International ® INTRODUCTION Deprocessing of integrated circuits (ICs) is often the final step for defect validation in failure analysis (FA) cases with limited fault-isolation information and is an essential process for reverse engineering for design verification and competitive analysis. State-of-the-art methods include expert hand polishing, selected areamilling, and focused ion beam deprocessing. These techniques struggle to maintain a high success rate as semiconductor process nodes scale down due to the increased number of layers, a reduction in dielectric thickness, adoption of porous low-k dielectrics, increased IC density, and smaller metal interconnect features. Large-area delayering has recently advanced via plasma-source focused ion beam-scanning electronmicroscopy (FIB-SEM) deprocessing that couples high currents over large areas with new chemistries, providing superior control and homogeneous material removal of heterogeneousmaterials in ICs, notably copper interconnects and porous silicon-based dielectrics. A new concept, based on plasma FIB deprocessing of devices from the silicon substrate backside, is now introduced to enable a greater success rate on lower- metal interconnects and high-density transistor levels. A comparison is shown between plasma FIB deprocessing from the interconnect side (frontside) and the backside deprocessing approach, using samples ultrathinned in the packaged device. Ultrathinning the silicon substrate significantly reduces the amount of time required and provides aneven starting surface for deprocessing,making This articlewas presented at theWashington, D.C.-area 10th Annual FIB SEMWorkshop, National Institute of Standards and Technology (NIST), Gaithersburg, Md., March 2, 2017. it possible to imagemost dense lower layers first while the sample is uniform and enabling larger volumes of the IC to be deprocessedwith increased success rate, resolution, and uniformity. Automated backside thinning followed by plasma FIB deprocessing integrates with the typical work- flow, which includes nondestructive evaluation via optical imaging and x-ray computed tomography (CT) scanning. X-RAY CT SCANNING X-ray tomography is a nondestructive process to visualize the internal structure of an object, and it is often completed on an IC device prior to any mechanical, charged particle, or chemical deprocessing. The prin- ciple of tomography is based on a well-known method of acquiring a stack of 2-D images from different angles and using mathematical algorithms to reconstruct the 3-Dmodel. The typical role of lab-based x-ray CT systems in FA and reverse engineering is to provide connectivity information on the printed circuit board (PCB) level and packaging components. [1-5] Synchrotron-based x-ray tomography can improve on the spatial resolution of lab-based x-ray tomography tools and has been applied to extract interconnect and trace data corresponding to 14 nmnode technology. [6] However, at present no singular x-ray tomography system, in a labor in a synchrotron facil- ity, has sufficient spatial resolution to extract IC structural and component detail at the finest scales corresponding to 10 nm or throughout the entire volume of a 1 cm 2 die. Therefore, x-ray methods alone may not be relied on to nondestructively reconstruct the entire architecture of