AMP_06_September_2021

PHOENIX, ARIZONA PHOENIX CONVENTION CENTER OCTOBER 31 – NOVEMBER 4 The 47th International Symposium for Testing and Failure Analysis (ISTFA), the premier conference and exhibition for the microelectronics failure analysis community, is scheduled for October 31 – November 4 in Phoenix. This year’s theme—Riding the Wave of System-in-Package—will be evident throughout the event in user group meetings, technical presentations, and keynote. The conference also includes the highly popular EDFAS video and photo contests. ISTFA once again o ers the opportunity to take an immersive half or full-day educational course. This year’s tutorial programextends the learning process to awider selection of topics. The technical sessions feature over 100 presentations of original unpublished work in areas such as sample preparation and device deprocessing, fault isolation, silicon photonics FA, scanning probe analysis, and emerging FA techniques and concepts. And the Expo features key companies showcasing the best technologies and products in the industry. ISTFA’s keynote speaker, Dr. Ravi Mahajan, is an Intel Fellow responsible for assembly and packaging technology pathfinding for future silicon nodes. He holds original patents for silicon bridges that became the foundation for Intel’s EMIB technology. His talk will present the challenges and opportunities in developing robust advanced package architectures. EDUCATION WORKSHOPS • ESD – FA Instructor: Dr. Steven H. Holdman • Review of Scanning Probe Microscopy Methods Instructor: Dr. Peter De Wolf • Beam-Based Defect Localization Instructor: Dr. Ed Cole, Jr. • Optical, Infrared, and FA Microscopy Instructor: Mr. John McDonald For dates, times, and full course descriptions, visit istfaevent.org . TUTORIALS An expanded tutorial program addresses 22 topics, including four new ones: Featured Talk: 3D Devices • New 3D Device/Package Fault Isolation and Failure Analysis Microscopy • Basics and Current Aspects of Scanning Electron Microscopy Package and Physical Analysis • Electromigration Analysis Located between the Internal Layers of a Printed Circuit Board Package and Physical Analysis • Failure Analysis for Hardware Security Riding the Wave of System-in-Package (SiP) 47 TH INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS sponsored by: ORGANIZED BY:

RkJQdWJsaXNoZXIy MTMyMzg5NA==