edfas.org 47 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 4 With close to five years of experience at AMD, Hsu’s expertise centers on diagnosing and resolving complex silicon-level failures across a wide range of products, including CPUs, GPUs, servers, and AI accelerators. His work encompasses advanced semiconductor packaging, manufacturing, design, and new product introduction debug. Hsu leads fault-isolation efforts from package to transistor level and is known for achieving exceptional accuracy in high-priority analyses. His contributions have earned him multiple Spotlight Awards, including the AMD Executive Spotlight Award. Before joining AMD, Hsu was a research assistant at National Taiwan University, focusing on microfluidic devices. Hsu holds a master’s degree in electrical and computer engineering from the University of Florida and a master’s in applied mechanics from National Taiwan University. In addition to his engineering achievements, Hsu is actively involved with the EDFAS SYP Committee and has Hsu published research in ISTFA conference proceedings and EDFA magazine. Outside the professional sphere, Hsu enjoys fitness training, dancing, and collecting vintage items. HOW TO PARTICIPATE To be eligible as a mentee, applicants must be current or former members of the EDFAS SYP Committee. Founded in 2023, the SYP Committee is dedicated to building the future workforce and technical leaders in microelectronics FA. The committee welcomes students who have an interest in microelectronics FA as well as emerging professionals who are active in their career and within five years of their graduation. Prospective SYP members can contact Membership Service (memberservicecenter@ asminternational.org) for additional details. Those interested in serving as future mentors are encouraged to contact Phil Kaszuba (phil.kaszuba@gmail. com). We are excited about the continued growth of this mentorship program and look forward to welcoming you into our growing mentorship community. GUEST EDITORIAL CONTINUED FROM PAGE 2 for example, might not immediately see a place for themselves in electronic systems analysis. But with guidance, those interests can be reframed as natural entry points into circuit analysis or reliability testing. Equally important, these models emphasize the broad competency set that defines success in the field. Technical skills such as circuit analysis, materials characterization, and reliability engineering are essential. But they are complemented by “durable skills:” experimental design, attention to detail, complex problem solving, collaboration, and technical communication. These are the connective tissues that allow engineers to move across domains and tackle unfamiliar challenges. The EDGE-Epixego partnership complements degree and certification pathways with competency frameworks that help students discover multiple pathways into failure analysis. By inviting students from a wide range of disciplines to see themselves in the field, we can better align education with the needs of employers seeking agile, interdisciplinary thinkers. Expanding the talent pipeline is not just about creating more programs—it is about changing how we frame the field of failure analysis. We must normalize nonlinear career paths, value curiosity and resilience, and create opportunities for students to encounter—and even embrace—failure as part of learning. When done well, this approach will not only grow the workforce; it also strengthens the field itself, bringing in perspectives and capabilities that reflect the complexity of the systems we seek to understand. REFERENCE 1. “Chipping Away: Assessing and Addressing the Labor Market Gap Facing the U.S. Semiconductor Industry,” Semiconductor Industry Association/Oxford Economics, 2023, semiconductors.org/ wp-content/uploads/2023/07/SIA_July2023_ChippingAway_ website.pdf.
RkJQdWJsaXNoZXIy MTYyMzk3NQ==