edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO.4 26 IC fabricated at the 130 nm node were successfully reconstructed. Slices from the 3D reconstruction are shown and compared to the same layers in the IC design file in Fig. 4. The design file was not used as an input to guide the reconstruction; it was used only for comparison to verify that all expected wiring features are reconstructed from the experimental data. The cubes present throughout the reconstruction slices are chemical-mechanical polishing (CMP) fill. They are not included in the design file but are expected in the actual circuit and thus are prevalent in the reconstructed slices.[15] The reconstruction was then used to quantify the resolution of the measurement. Line scans were taken over the edge of the smallest wiring features in the IC, and the modulation transfer function (MTF) was calculated. The MTF50, the point where the image contrast is reduced to 50%, was chosen as the image resolution metric.[16] The calculated MTF50 is 82 nm, well below the minimum feature size required for the 130 nm IC imaged. This MTF50 value indicates the resolution of this particular measurement, not the intrinsic resolution limit of the x-ray CT instrument. Here, SEM beam conditions were chosen to achieve an x-ray focal spot below 130 nm while maximizing x-ray flux, not to achieve the best possible spatial resolution.[10] The time required to collect data is a key consideration in x-ray CT measurements for FA. To explore the limits of the current measurement, the effect of the time spent at each positional dwell on image quality was assessed. During data acquisition, each 60 s dwell was broken up into six increments. Reconstructions were performed on each 10 s increment up to the full 60 s dwell time, and the MTF50 and MTF10 were calculated (Fig. 5). The MTF50 improved with decreasing dwell time, indicating that the measurement is not signal-limited. The total detector live acquisition time here was 8.4 hr; if 10 s dwell times had been used, the acquisition time would have been reduced to 1.4 hr without a loss in the achieved resolution. The decrease in image quality with increasing amount of signal can be explained by the longer dwell times required to acquire more signal and the associated increased positional drift. This larger total drift over 60 s, compared to 10 s, leads to increased blurring at the edges of fine wiring features and degrades the calculated image quality. CONCLUSION This work has demonstrated 3D images of an IC at sub-100 nm spatial resolution and discussed key experimental considerations to achieving nanoscale x-ray CT on planar semiconductor devices. All expec- ted wiring and via layers in a region-of- Fig. 5 The MTF50 was used as an image quality metric. Multiple line scans (red-dashed) were taken across the edge of wires in the reconstruction slices (left). The MTF50 and MTF10 of each line was found, with mean values of 82 nm and 40 nm, respectively (middle). Using less data results in lower predicted MTF50 and MTF10 value compared to the full 60 s dwell time (right). This is likely due to the increasing effect of positional drift at longer dwell times, indicating the results were not photon-count limited. Fig. 4 Two wiring layers taken from the full seven-angle reconstruction (left column) compared to the same wiring layers from the IC design file (right column). All expected features are present and well-resolved. 3D IMAGING OF INTEGRATED CIRCUITS VIA LIMITED ANGLE X-RAY TOMOGRAPHY(continued from page 23)
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