edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 2 4 EDFAAO (2026) 2:4-10 1537-0755/$19.00 ©ASM International® ELECTRICAL FAULT LOCALIZATION OF HIGH-DENSITY 3D INTERCONNECT VIA CHAINS THROUGH INNOVATIVE SAMPLE PREPARATION Kristof J.P. Jacobs imec, Leuven, Belgium kristof.j.p.jacobs@imec.be INTRODUCTION The growing demand for high-performance computing systems is driving innovation in system scaling. One emerging concept is CMOS 2.0, recently introduced by imec, where the system-on-chip (SOC) is divided into functional layers using system-technology co-optimization (STCO).[1] This concept is nowadays becoming practical thanks to recent breakthroughs in 3D interconnects and backside technologies. For example, wafer-to-wafer (W2W) hybrid bonding now enables sub-micron pitch interconnects, which are essential for stacking logic-on-logic or memory-on-logic. Backside power technology is also evolving toward enabling direct access to transistor terminals from the backside. At imec, dedicated test vehicles are used during development to validate advanced process technologies, with via chains playing a key role in yield analysis. While electrical testing of via chains can identify the presence of defects, failure analysis (FA) is required to localize the defective interconnect(s) and determine the root cause, enabling targeted process optimization. DEFECT LOCALIZATION IN VIA CHAINS USING OBIRCH AND LICA Optical beam-induced resistance change (OBIRCH) and light-induced capacitance alteration (LICA) are laser scanning based FA techniques that can be used for the localization of electrical open and short defects in via chains.[2,3] OBIRCH is effective for the localization of soft opens and leakage failures; however, it is not applicable for hard opens. In contrast, the LICA method, first proposed at ISTFA in 2016, is effective for the localization of hard open defects.[4] This is because the measurement principle of the LICA method relies on detecting laser-induced changes in the electrical capacitance, rather than laser-induced changes in the electrical resistance, being the case for the OBIRCH method. Figures 1a–c illustrate the application of OBIRCH to a wafer-to-wafer via chain containing a soft open defect, where the measured resistance of the chain exceeds its nominal value by approximately one megaohm. As shown in Fig. 1a, the resistance of the defective via chain is measured while the focused laser beam scans over the structure; when the beam hits a defective interconnect, the resulting local heating from the laser changes its electrical resistance, which generates a noticeable signal on the resistance meter. The change in the detected signal can be observed in the OBIRCH image (Fig. 1b) where the arrow points toward the location of the defective interconnect. The cross-sectional image in Fig. 1c shows an example of a high-resistance via, which has been localized using the OBIRCH technique. It should be noted that the OBIRCH image shown in Fig. 1b provides defect localization information only in the XY plane, which is generally adequate for relatively thin structures. However, it has also recently been shown that depth information can be extracted by analyzing the phase of the OBIRCH signal using a lock‑in detection approach.[5,6] This capability may be particularly useful for defect localization in more complex structures. Figures 1d–f illustrate the application of LICA to a W2W via chain containing a hard open defect. In this case, the measured chain resistance lies in the giga‑ to tera‑ohm range, resulting in negligible current flow through the measurement circuit, rendering OBIRCH ineffective. Figure 1d shows the principle of the LICA measurement. Unlike OBIRCH, the laser beam is not used to induce localized heating, but to generate electron-hole pairs in the underlying silicon substrate, thereby locally changing the electrical capacitance of the structure. To detect these capacitance changes, a capacitance meter is connected across the via chain and the substrate. Capacitance changes are detected only for interconnects that remain electrically connected to the capacitance meter. A hard
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