A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS AUGUST 2026 | VOLUME 28 | ISSUE 3 ELECTRONIC DEVICE FAILURE ANALYSIS edfas.org EXPANDING THE APPLICATION RANGE OF EBIRCH AUTOMATED END-TO-END AI SOLUTION FOR PEM BUILDING TODAY’S MICROELECTRONICS WORKFORCE MOISTURE AND MICROELECTRONIC DEVICES 4 18 11 26
A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS AUGUST 2026 | VOLUME 28 | ISSUE 3 ELECTRONIC DEVICE FAILURE ANALYSIS edfas.org EXPANDING THE APPLICATION RANGE OF EBIRCH AUTOMATED END-TO-END AI SOLUTION FOR PEM BUILDING TODAY’S MICROELECTRONICS WORKFORCE MOISTURE AND MICROELECTRONIC DEVICES 4 18 11 26
edfas.org 1 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 ABOUT THE COVER “A million dollar worm.” A low yield-issue with a potential loss of a million dollars led to bench testing, live x-ray, and EDX mappings. The root cause was caught and surprised everyone: An aluminum “worm” (orange) shorted two adjacent copper wires (blue). It even has a carbon “eye” (pink). Photo by Hongqi Deng, Analog Devices, First Place Winner in False Color Images, 2025 EDFAS Photo Contest. A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS AUGUST 2026 | VOLUME 28 | ISSUE 3 edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS DEPARTMENTS Moisture and Microelectronic Devices Philipp wh Schuessler This article gives a simplified account of how Test Method 1018 for the determination of moisture in microelectronic devices evolved. Author Guidelines Author guidelines and a sample article are available at edfas.org. Consult the guidelines prior to manuscript preparation. 4 11 2 GUEST EDITORIAL Bob Keller and Rebecca Routson 30 SPECIAL ISTFA 2026 PREVIEW Kristofor Dickson 33 ISTFA 2026 EXHIBITORS LIST 34 ISTFA 2026 EXHIBITOR SHOWCASE 36 EDFAS 2026 PHOTO CONTEST 37 EDFAS 2026 VIDEO CONTEST 38 INTERNATIONAL EDFAS FA WORKSHOP SUMMARY 41 DIRECTORY OF FA PROVIDERS Rosalinda Ring 42 LITERATURE REVIEW Michael R. Bruce 44 PRODUCT NEWS Ted Kolasa 46 TRAINING CALENDAR Rosalinda Ring 48 ADVERTISERS INDEX Automated End-to-End AI Solution for Photon Emission Microscopy in Semiconductor Failure Analysis Guofeng You, Silambarasan Karuppannan, Kan Sun, Wilson Lee Cheng Hoe, and Grace Tan To address the limitations of photon emission microscopy (PEM), this article presents an end-to-end AI application for PEM analysis that integrates three capabilities into a single user workflow: automated hotspot detection, quantitative reference-to-target comparison, and layout correlation. 18 For the digital edition, log in to edfas.org, click on the “News & Magazines” tab, and select “EDFA Magazine.” Expanding the Application Range of Electron Beam Induced Resistance Change from Low- to High-Ohmic Failures Oscar Recalde-Benitez, Andreas Rummel, and Stephan Kleindiek By bridging the gap between EBAC and EBIC, EBIRCH provides a unified framework for analyzing a wide range of electrical defects without the need for high-voltage irradiation or destructive conditioning. 11 4 26 18 Leading the Charge in Building Today’s Microelectronics Workforce Errol Flynn The microelectronics industry is one of the most power- ful engines driving technological advancement, economic growth, and national security. To be a world leader, the United States must also lead in talent, and the Midwest Microelectronics Consortium is helping to lead that charge. 26
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 2 The CHIPS Metrology Program at the National Institute of Standards and Technology (NIST) was established to “enable advances and breakthroughs in measurement science, standards, material characterization, instrumentation, testing, and manufacturing capabilities that will accelerate the underlying research and development for metrology of next-generation microelectronics.”[1] Metrology underlies all semiconductor manufacturing to benchmark, monitor, control, and improve processes, and to provide confidence in the introduction of technological innovations. Failure analysis (FA), which lies at the heart of successful yield enhancement and reliability assurance, is especially critical for de-risking new process nodes and diagnosing field returns. Metrology tools and techniques form the foundation for an effective FA workflow, where high-resolution fault localization is critical. Central to remedying an electrical failure is identifying a root morphological cause, such as a short, an open, or a void, which, in turn, depends heavily on the nature of the engineered materials making up a device. Rigorously vetted methods for characterizing the atomic structure and chemical composition of engineered materials enable a trusted assessment of the likelihood of defect formation and subsequent performance degradation or failure. This commentary describes some key FA-relevant CHIPS Metrology projects that aim to strengthen FA engineers’ ability to diagnose and improve manufacturing processes for high yield and high reliability. Commonly used tools for FA in semiconductor manufacturing include transmission electron microscopy (TEM), scanning electron microscopy, atomic force microscopy, focused ion beam microscopy, energy dispersive spectroscopy, and surface analysis methods such as secondary ion mass spectrometry and x-ray photoelectron spectroscopy.[2] Expanding on these capabilities, CHIPS Metrology is advancing new and improved metrology tools and methods that have the potential to significantly disrupt FA workflow in a positive way. Below are descriptions of selected projects that exemplify the advances expected to provide value to the FA community. AUGUST 2026 | VOLUME 28 | ISSUE 3 A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS ELECTRONIC DEVICE FAILURE ANALYSIS GUEST EDITORIAL SEMICONDUCTOR FAILURE ANALYSIS IN THE CHIPS METROLOGY PROGRAM Bob Keller and Rebecca Routson CHIPS Metrology Program, NIST bob.keller@chips.gov rebecca.routson@chips.gov edfas.org PURPOSE: To provide a technical condensation of information of interest to electronic device failure analysis technicians, engineers, and managers. Nicholas Antoniou Editor/KLA - nicholas.antoniou@kla.com Joanne Miller Senior Editor Victoria Burt Managing Editor Allison Freeman Production Supervisor ASSOCIATE EDITORS Navid Asadi University of Florida Guillaume Bascoul CNES France Felix Beaudoin GlobalFoundries Michael R. Bruce Consultant Jiann Min Chin Advanced Micro Devices Singapore Michael DiBattista Varioscale Inc. Rosine Coq Germanicus Universitié de Caen Normandie Szu Huat Goh Qualcomm Jason Holm NIST Ted Kolasa Northrop Grumman Space Systems Joy Liao Nvidia Corp. Rosalinda M. Ring NenoVision Amrutha Sampath NXP Semiconductors Tom Schamp E-Space David Su Yi-Xiang Investment Co. Martin Versen University of Applied Sciences Rosenheim, Germany FOUNDING EDITORS Edward I. Cole, Jr. Sandia National Labs Lawrence C. Wagner LWSN Consulting Inc. GRAPHIC DESIGN Jan Nejedlik, jan@designbyj.com PRESS RELEASE SUBMISSIONS magazines@asminternational.org Electronic Device Failure Analysis™ (ISSN 1537-0755) is published quarterly by ASM International®, 9639 Kinsman Road, Materials Park, OH 44073; tel: 800.336.5152; website: edfas. org. Copyright © 2026 by ASM International. Receive Electronic Device Failure Analysis as part of your EDFAS membership. Non-member subscription rate is $190 U.S. per year. Authorization to photocopy items for internal or personal use, or the internal or personal use of specific clients, is granted by ASM International for libraries and other users registered with the Copyright Clearance Center (CCC) Transactional Reporting Service, provided that the base fee of $19 per article is paid directly to CCC, 222 Rosewood Drive, Danvers, MA 01923, USA. Electronic Device Failure Analysis is indexed or abstracted by Compendex, EBSCO, Gale, and ProQuest. Routson Keller (continued on page 40)
edfas.org 3 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 4 EDFAAO (2026) 3:4-10 1537-0755/$19.00 ©ASM International® EXPANDING THE APPLICATION RANGE OF ELECTRON BEAM INDUCED RESISTANCE CHANGE FROM LOW- TO HIGH-OHMIC FAILURES Oscar Recalde-Benitez, Andreas Rummel, and Stephan Kleindiek Kleindiek Nanotechnik, Reutlingen, Germany oscar.recalde@kleindiek.com INTRODUCTION Electron-beam-based fault isolation has become an indispensable component of semiconductor failure analysis workflows, enabling precise localization and characterization of defects at the micro- and nanoscale. In particular, techniques based on electron beam induced current (EBIC), such as resistive contrast imaging (RCI), electron beam absorbed current (EBAC), electron beam induced voltage (EBIV), and electron beam induced resistance change (EBIRCH), offer the spatial resolution necessary to identify shorts, opens, and leakage defects in integrated circuits. While EBAC and RCI have been widely adopted for backend and frontend fault isolation, both techniques primarily visualize the electrically connected path.[1-2] The beam-induced signal reflects current flow or resistance modulation along the entire path, and the presence of a defect is typically inferred from a disruption, attenuation, or redistribution of this path rather than from a direct localization of the defect itself. In EBAC, the absorbed beam current is detected along a conduction path, whereas RCI monitors beam-induced resistance variations that depend on the current flowing through the same path, making it particularly suitable for high-ohmic structures. Similarly, EBIV measures beam-induced voltage variations caused by the electron beam flowing through the connected resistive structure and is well suited for low-ohmic paths. In all cases, the contrast is path-dominated and can be strongly influenced by parasitic junctions, leakage paths, and nonlinear conduction mechanisms, which may obscure the precise location of the defective site.[3] In contrast, EBIRCH is an emerging technique that enables direct micro and nanoscale localization from low- to high-ohmic failures by detecting resistance modulations under electron-beam irradiation rather than probing absorbed or emitted current. EBIRCH directly measures resistance changes induced by the interaction between a focused electron beam and a locally biased region.[4] The EBIRCH signal typically peaks at the location of the resistive anomaly itself, enabling precise spatial correlation between the electrical failure and the physical defect site, particularly in backend structures such as metal lines, contacts, and vias. Additionally, a recent study demonstrated that high- voltage electron beam irradiation can be exploited to suppress gate leakage and enhance EBIRCH defect localization via electron-beam-induced charge trapping in gate oxides.[5] This work highlights that electron-beam interactions can modify the local electrical behavior of nanoscale devices, enabling improved contrast and defect identification. Building on these developments, the present study explores the full dynamic range of EBIRCH and demonstrates its applicability across a wide impedance range. EBIRCH can be applied from low- and intermediate-ohmic shorts (hundreds of Ohms to tens of kOhms), such as in metal lines and/or transistor gate–source failures, up to high-ohmic leakages (>100 MΩ) e.g., in via chains. The technique is robust against interference from other EBIC modes and is compatible with electron beam nanoprobing systems, enabling precise failure localization in structures that are challenging for techniques such as optical beam induced resistive change (OBIRCH) or photo emission microscopy (PEM) due to the high spatial resolution required. By systematically analyzing low- to high-ohmic regimes, this work provides a comprehensive overview of EBIRCH as a complementary technique to other EBIC modes and presents qualitative and quantitative results that guide the selection of electron beam and external bias parameters for nanoscale fault isolation across a broad range of impedances in diverse electronic interconnects and device structures.
edfas.org 5 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 EBIRCH PHYSICAL MECHANISMS EBIRCH contrast arises from the interaction between an externally biased conductive path and a localized perturbation introduced by the electron beam. The applied bias establishes a steady-state current in the device under test (DUT), which serves as the measurement baseline. When the electron beam interacts with the DUT, it can induce localized changes in the electrical response, including: Local Heating. The beam deposits energy in highresistance regions or bottlenecks, raising the local temperature and modulating resistance via the temperature coefficient of resistance (TCR) or thermally activated conduction mechanisms. Thermoelectric (Seebeck) Effects. Voltages generated at interfaces between dissimilar materials can add to or subtract from the applied bias, producing apparent resistance changes that may depend on bias polarity. Carrier Generation and Local Charging. In semiconductor or dielectric regions, the electron beam can generate carriers or deposit charge, influencing the measured current or voltage. The resulting EBIRCH signal is a combination of these effects, and their relative contributions depend on the material, geometry, applied bias, and measurement setup. Consequently, the contrast highlights resistive bottlenecks, failures, or other electrical anomalies without assuming a single dominant mechanism.[3] In comparison, optically based techniques such as OBIRCH operate on a similar principle of perturbing a biased DUT, but in this case the laser directly generates local heating, increasing the temperature of the illuminated region and modulating its resistance. Differences between EBIRCH and OBIRCH are primarily in the nature and spatial distribution of energy deposition (electron beam vs laser) and achievable spatial resolution, rather than in the physical origin of the signal.[6] Practical considerations, such as amplifier resolution or signal-to-noise ratio, often dictate the bias level required for EBIRCH measurements; increasing the applied bias enhances the measurable response to localized perturbations without altering the underlying physical mechanisms. EXPERIMENTAL SETUP All experiments reported in this work were conducted on a Kleindiek Nanotechnik (KN) prober shuttle including EBIC amplifier loaded into Zeiss GSEM 460NP and 300 field-emission scanning electron microscopes.[7] The overall system allows simultaneous electrical and electron-beam stimulation through nanomanipulated tungsten probe needles mounted on a KN prober shuttle (PS8). The electrical measurements were performed using either the integrated KN Live Contact Tester (LCT) for preliminary defect characterization up to 100 MΩ, or a Keithley 4200A-SCS parameter analyzer for precise I–V acquisition and bias control. The EBIRCH current was monitored via the EBIC amplifier, capable of detecting current variations from the sub-picoampere to microampere range. The system supports multiple probe configurations with full routing control via an integrated KN signal switching unit, all implemented on a standard 19-in. electronics rack, see Fig. 1. EBIRCH MEASUREMENT CONFIGURATION The experimental geometry employed was a twoneedle EBIRCH. Meaning, a voltage bias was applied to one probe, while the EBIC amplifier monitored the current Fig. 1 From left to right: Standard Kleindiek Nanotechnik rack including micromanipulator nanocontrollers and EBIC amplifier; KN Prober Shuttle 8; schematic of EBIC signal acquisition in the SEM;[6] and simultaneous secondary electron and EBIC signal acquisition.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 6 at the second probe. This setup enables simultaneous input voltage and current measurement across the failure. Typical EBIRCH operating currents ranged from 100 nA to several µA, and the electron beam penetration depth was controlled by adjusting the accelerating voltage (1-5 kV) according to the approximate rule of thumb of 100 nm per kV in silicon. All reported currents account for the series resistance of the measurement setup (~5-6 kΩ), which reduces the measured current relative to the simple V/R device estimate. For clarity, this measured current will be referred to as the “EBIRCH current” throughout the remainder of the text. LOW-OHMIC DEFECT LOCALIZATION A localized low-ohmic resistance variation was iden- tified in a metal line of a 3 nm technology node device having an overall resistance of 150 Ohms (Fig. 2a). Electrical characterization indicated a globally low resistance with a subtle localized increase attributed to a geometric narrowing of the interconnect, rather than an open or diode-like behavior. EBIRCH imaging was performed by applying a 20 mV external bias, resulting in an EBIRCH current of approximately 1.4 µA through the line using 500 V and 9 nA electron beam voltage and current, respectively (Fig. 2b). The EBIRCH image revealed a confined region of resistance modulation, appearing as a localized peak, precisely aligned with the narrowed metal segment (Fig. 2c). This contrast is consistent with localized beaminduced heating in a low-resistance structure. Complementary EBIV imaging of the same region showed a distinct voltage contrast transition across the narrowed segment (Fig. 2e), directly reflecting the localized voltage drop caused by the resistance increase. While EBIV provided a clear mapping of the voltage gradient, EBIRCH enabled precise defect localization through sensitivity to subtle resistance variations. INTERMEDIATE-OHMIC DEFECT LOCALIZATION A low-ohmic short (13 kΩ) was found between the gate and source terminals of a SRAM n-MOS transistor in a 22 nm technology node device (Fig. 3a). I–V characterization with the LCT revealed a nearly linear response consistent with a resistive short (Fig. 4b), unlike the diode-like curve of intact devices (Fig. 4a). EBIRCH imaging (Fig. 3b) was performed by applying a 0.02 V bias, resulting in an EBIRCH current flow of 770 nA through the defect, and an electron beam voltage of 1 kV at 75 pA beam current. The EBIRCH image revealed a localized region of resistance modulation corresponding precisely to the shorted contact pair (Fig. 3c). Fig. 2 Metal line in a 3 nm technology-node device. (a) SEM image showing the two-probe configuration with a 5 µm probeto-probe spacing. (b) Raw EBIRCH image. (c) Overlay image showing the EBIRCH red spot coinciding with the metal line narrowing (cyan arrow). (d) SEM image corresponding to the EBIV image shown in (e); note the contrast change (circled) located at the metal line narrowing in the EBIV image. The scale bar represents 500 nm. (a) (b) (c) (d) (e)
edfas.org 7 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 In comparison, EBAC imaging of the same structure displayed a continuous conductive path without a clear indication of the defect’s spatial origin (Figs. 3d and e). EBIRCH thus provided unambiguous defect localization through resistance change contrast rather than simple current mapping. HIGH-OHMIC DEFECT LOCALIZATION A high-ohmic defect (~100 MΩ) was identified in a viachain structure from a 10 nm processor (Fig. 5a). Leakage measurements showed diode-like I–V behavior with 10 to 100 nA leakage currents at ±1 V. The sample was biased at −1.2 V resulting in an approx. EBIRCH current of 1.5 µA through the defect, with an electron beam energy of 2 kV and beam current of 500 pA (Fig. 5b). Despite the low leakage, due to the diode-like nonlinear behavior of the defect (similar to other case studies), EBIRCH successfully detected resistance modulation down to sub-nanoamp levels, confirming its capability for high-impedance and nonlinear failure analysis (Fig. 5c). Even when the EBIRCH current was reduced to 300 pA, the defect spot remained visible, although the background signal from the underlying active area became noticeable at very high amplifier gains (Fig. 5d). Care was taken to avoid direct irradiation of active p–n junctions, which would otherwise generate strong EBIC signals and obscure the EBIRCH contrast. ADVANTAGES AND LIMITATIONS The principal advantage of EBIRCH is its direct sensitivity to local resistance variations, enabling defect localization over a wide resistance range without relying on absorbed-current contrast. By operating under an applied electrical bias, EBIRCH exploits electron-beaminduced perturbations, most notably localized heating, to modulate resistance and generate spatial contrast. This makes the technique particularly effective for identifying subtle low-ohmic and intermediate-ohmic defects that are difficult to resolve using conventional current-mapping approaches. At the same time, the electron beam plays a dual role in EBIRCH measurements. While it is essential for generating resistance contrast, beam-induced effects such as localized heating, charge trapping, or carrier redistribution may also modify the electrical response of the device under test. Under carefully controlled conditions, these interactions can enhance contrast and improve defect visibility, effectively increasing sensitivity to small resistance variations. Conversely, excessive beam energy, dose, or prolonged exposure may alter the defect state or surrounding material, leading to signal drift, contrast inversion, or changes in the apparent resistance. Fig. 3 Short in an SRAM of a 22 nm technology-node device. (a) SEM image showing the probe tips placed on the source and gate, respectively. (b) Raw EBIRCH image. (c) Overlay EBIRCH/SEM image highlighting the EBIRCH hotspot (red spot) (a filter showing the maximum current was applied by the EBIC overlay tool). (d) SEM image corresponding to (e) the EBAC signal. Note that the EBAC contrast indicates the presence of a short but does not provide the precise defect location. The scale bar represents 500 nm. (a) (b) (c) (d) (e)
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 8 (a) (b) (c) (d) (a) (b) Fig. 4 I-V curves of (a) intact and (b) shorted device. Fig. 5 Short in a via chain on a 10 nm processor. (a) Overview SEM image of the via chain. The region of interest, indicated by a white dotted square, is shown in (b) and (c). (b) Raw EBIRCH image. (c) EBIRCH/SEM overlay image highlighting the failure localization (red spot). (d) Overlay image acquired with 300 pA EBIRCH current, note the still visible failure hotspot indicated with the white arrow. The scale bar represents 1 µm.
edfas.org 9 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 The application of an EBIRCH bias can further introduce increased signal fluctuation or apparent noise, likely arising from a combination of current-related noise under bias, low-frequency resistance fluctuations, beaminduced instabilities, and measurement-chain limitations. In practice, EBIRCH contrast may therefore appear embedded in a noisy background, particularly when targeting very small resistance changes. Nevertheless, the spatially localized nature of the EBIRCH response often remains preserved, and techniques such as image frame averaging or statistical filtering may be used to suppress uncorrelated background noise and facilitate defect localization. These observations highlight an inherent trade-off in EBIRCH operation: Signal strength and localization accuracy can often be optimized by adjusting beam energy, current, dwell time, and bias level, but more aggressive conditions may compromise quantitative interpretation or long-term device stability or even cure the failure such that the temperature sensitivity is lost when large currents are fed through the defect. EBIRCH is therefore most effective when operated in a controlled, low-damage regime that balances contrast enhancement against beam- and bias-induced perturbations. Despite these constraints, EBIRCH’s combination of low-voltage operation, direct resistance sensitivity, and compatibility with existing EBIC/EBAC instrumentation makes it a flexible and powerful technique for advanced failure analysis. When applied properly, electron-beam interaction can serve not only as a probe but also as a controllable means to enhance resistance contrast in otherwise challenging defect scenarios. CONCLUSIONS This work demonstrates that EBIRCH can successfully localize a wide range of ohmic failures within semiconductor devices using the Kleindiek Nanotechnik EBIC/EBIRCH system. By bridging the gap between EBAC and EBIC, EBIRCH provides a unified framework for analyzing a wide range of electrical defects without the need for high-voltage irradiation or destructive conditioning. The correlation with previously reported EBAC enhancement mechanisms reinforces EBIRCH’s potential as a universal fault isolation tool capable of resolving nanoscale defects in both conductive and resistive domains.[5] REFERENCES 1. S. Zheng, et al.: “Electron-beam-induced Current (EBIC) Imaging Technique to Quicken Polysilicon Defect Localization in MOSFETs,” Microelectronics Reliability, 128, Jan. 2022, p. 114432, doi.org/10. 1016/j.microrel.2021.114432. 2. G. Salviati, et al.: “Assessment of Semiconductors by Scanning Electron Microscopy Techniques,” Comprehensive Semiconductor Science and Technology, Elsevier, 2011, p. 308-356, doi.org/10.1016/ B978-0-44-453153-7.00110-3. 3. G.M. Johnson, et al.: “Distinguishing Between Electron-beam Signals in Probing of SRAM Modules for Yield Management,” SEMI Advanced Semiconductor Manufacturing Conference (ASMC), IEEE, May 2019, p. 1-6, doi.org/10.1109/ASMC.2019.8791824. 4. A. Rummel and G.M. Johnson: “Optimizing EBAC/EBIRCH Analysis in 5 nm Technology,” IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), IEEE, Jul. 2022, p. 1-6, doi.org/10.1109/IPFA55383.2022.9915709. 5. P.T. Ng, et al.: “Enhanced EBAC Localization of Gate Oxide Defects After High Voltage Electron Beam Irradiation,” Microelectronics Reliability, 147, Aug. 2023, p. 115074, doi.org/10.1016/j.microrel.2023.115074. 6. C. Wu and B. Corinne: “Leakage Current Study and Relevant Fault Localization by IR-OBIRCH,” International Symposium on the Physical and Failure Analysis of Integrated Circuits, IEEE, Jun. 2015, p. 267-270, doi.org/10.1109/IPFA.2015.7224394. 7. L. Rigutti and M. Tchernycheva: “Electrical and Electro-Optical Char- acterization of Semiconductor Nanowires,” Characterization of Semi-conductor Heterostructures and Nanostructures, Elsevier, 2013, p. 641-684, doi.org/10.1016/B978-0-444-59551-5.00015-7. ABOUT THE AUTHORS Oscar Recalde-Benitez is a specialist in advanced electron microscopy and nanoscale device characterization. He earned his Dr.-Ing. from the Technical University of Darmstadt, focusing on in situ and operando TEM studies of electronic materials and MIM-based nanoelectronic systems. He currently serves as a research and development engineer at Kleindiek Nanotechnik. His work integrates electron microscopy, FIB-based sample preparation, and functional device testing at the nanoscale, with a strong emphasis on translating research concepts into practical instrumentation. Andreas Rummel studied physics at the Eberhard Karls Universität Tübingen, specializing in electron and force microscopy. He is engaged in applied research and development at Kleindiek Nanotechnik, with a focus on electrical probing techniques such as EBIC, EBAC, and EBIRCH, as well as advanced sample preparation and micro-/nanomanipulation.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 10 ESREF 2026 The 37th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2026) will take place September 21-24 in Vienna. This international symposium has a focus on reliability in all aspects of electronics including new applications in extremely harsh environments such as space, transport, energy conversion, and smart functions. It provides the leading European forum for developing all aspects of reliability management and innovative analysis techniques for present and emerging semiconductor applications. For more information, visit esref2026.org. ITC 2026 The International Test Conference (ITC) will be held October 11-16 in San Antonio. ITC is the world’s premier conference dedicated to the electronic test of devices, boards, and systems covering the complete cycle from design verification, test, diagnosis, failure analysis, and back to process and design improvement. At ITC, test and design professionals will confront the challenges the industry faces and learn how these issues are being addressed by the combined efforts of academia, design tool and equipment suppliers, designers, and test engineers. ITC, the cornerstone of TestWeek events, offers a wide variety of technical activities targeted at test and design theoreticians and practitioners. The conference includes paper sessions, keynotes, tutorials, case studies, and commercial exhibits and presentations, and a host of ancillary professional meetings. ITC is sponsored by the IEEE. For more information, visit itctestweek.org. NANOTS 2026 The 46th annual NANO Testing Symposium (NANOTS 2026) will be held at the Senri Life Science Center, in Toyonaka, Osaka, Japan, on November 10-12. NANOTS is one of the leading technical symposiums for discussing solutions that improve the testing process of nanoscale devices and materials. NANOTS is sponsored by the Institute of NANO Testing in cooperation with the Institute of Electronics, Information and Communication Engineers, the Japan Society of Applied Physics, the Reliability Engineering Association of Japan, and the Union of Japanese Scientists and Engineers. For more information, visit the NANOTS website at inanot.sakura.ne.jp/nanots. NOTEWORTHY NEWS Stephan Kleindiek graduated from the University of Marburg and went on to earn his Ph.D. in physics at the University of Tübingen. During his doctoral research, he focused on scanning tunneling microscopy and developed a highly precise positioning system known as the Nanomotor. After a research stay at the IBM T.J. Watson Research Center in Yorktown Heights, New York, he returned to Germany and founded Kleindiek Nanotechnik. Today, the company provides advanced micro- and nanoscale positioning and manipulation systems, widely used in semiconductor failure analysis and other high-precision applications.
edfas.org 11 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 MOISTURE AND MICROELECTRONIC DEVICES Philipp wh Schuessler Consultant, retired, Preston Hollow, New York philippwhschuessler@gmail.com EDFAAO (2026) 3:11-14 1537-0755/$19.00 ©ASM International® INTRODUCTION This article covers some of the milestones and pitfalls encountered over the past half century in the endeavor to accurately ascertain moisture levels in high reliability microelectronics. As the history is unveiled, one will hopefully gain insight into how a simple molecule of just three atoms (i.e., water) has confounded the microelectronics community, and how previous practices and assumptions in the manufacturing line have been shown to be the death knell for a product. One of the subsequent conclusions regarding moisture in microelectronics for all to keep in mind is that “chemistry happens,” and it does so continuously over time. That conceptually simple water molecule is ubiquitous and contributes significantly to changes occurring within a sealed device. The following history is divided into three sections: (1) the early days, when microelectronic packaging concepts and processes were being developed; (2) the problems with creating a hermetic package; and (3) the analytics developed to prove the precision and accuracy of moisture content data. THE EARLY YEARS By the mid-1950s, transistors were becoming the basis for the emerging microelectronic community. New packaging concepts for these devices were also being developed as plastics and polymers were also rapidly evolving. By the 1960s, it was realized that these devices needed to be kept dry. The early solution to moisture-related problems was to require all microelectronic devices to be hermetic and free of all organic compounds. Solutions available at that time were unfortunately expensive, design limiting, and impossible to prove. At the same time, the plastics industry wanted to be involved with the booming microelectronics industry and advertised numerous moisture “resistant” capabilities. Despite many new materials and their improved barrier properties, it was realized in the early 1970s that no polymer is impermeable to water, regardless of the supplier’s claims. The problem of maintaining hermeticity and cleanliness in the early days was best exemplified when a Saturn rocket failed to launch. Subsequent failure analysis showed that the problem was due, in part, to corrosion of a microcircuit. During the subsequent failure analysis, a circuit line within an onboard microcircuit device was found to have a spot of dried spittle (Fig. 1). The moisture (and most probably, the ionic species within it) from a suspected sneeze was more than sufficient to corrode the circuit, and the heavy vibrations within the rocket during the final seconds of launch caused the circuit line to break. The subsequent costs of failure analysis, stand down of the mission, refit, etc. exceeded $10,000,000. As the manufacturing of hermetic metal and/or ceramic devices became the accepted packaging concept for high reliability use in military and aerospace applications, the need to prove that the cavity of a device was truly dry became a necessity. In the mid to late 1970s, formal Fig. 1 A photo of a Saturn 9 rocket circuit trace that failed due to unwanted moisture.[2]
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 12 requirements were put into place. The military required that high reliability microcircuits were to contain less than 5000 ppm(v) moisture when tested at ~100°C. The requirement was published as Test Method 1018 in MILSTD-883. The original document identified three analytical techniques that could be used: (1) gas chromatography, (2) mass spectroscopy or residual gas analysis (RGA), or (3) moisture sensors. Of the three, RGA was found to be least affected by moisture adsorption and soon became the preferred analytical method to test for moisture within a cavity device. Unfortunately, the analytical community had yet to develop and perfect the analytical test methods and protocols to meet that measurement requirement. Furthermore, there weren’t any standards for certifying the accuracy of moisture at such low levels. Nevertheless, by 1980, Test Method 1018 was “Dated,” i.e., put into effect. The Preparing Activity responsible for this requirement was the Rome Air Development Center (RADC) at Griffiss Air Force Base in Rome, New York. Any discrepancies in the reported moisture levels within a production certification lot would be addressed by the RADC lab. The lab also continued the search for a moisture standard so that the various analytical labs and the device manufacturers could be assured of the data accuracy, vis-a-vis the reject criteria. In the interim, RGA “calibration” was accomplished via a NIST certified moisture generator in conjunction with a three-volume calibrator kept within each analytical facility. PROBLEMS AND LESSONS LEARNED The manufacturing community quickly challenged the 5000 ppm(v) limit as it appeared that the value was a number pulled from a hat. But such is not the case, as that value is the dew point for moisture at -2.4°C. At this temperature, moisture in a typical 1 cc hybrid package will transition directly from ice to water vapor without passing through the liquid phase. In essence, the moisture sublimes and cannot support the transportation of any residual ionic species. This was a point that had to be emphasized quite often, especially to those who looked at chemistry as a form of black magic. At that time, device manufacturers also made the grave mistake of assuming that all product in a given production lot is identical. To put it bluntly, this assumption was as poor then as it is today. Each device has its own variation in physical and chemical makeup, and those variations can become very significant for Class B and H hybrid devices. Another practice within the manufacturing houses that had to be addressed was the proper technique to dry parts prior to hermetically sealing them. At room temperature (20°C or 68°F), water molecules in the air move at an average speed of approximately 590 to 640 m/s. This means the sealing operator cannot take parts from a drying oven and carry them to the sealing machine without water adsorbing at part surfaces. As the parts quickly cool, what was done during the drying process is quickly undone upon exposure to the ambient environment. One naturally questions how much water is re-adsorbed, and a door to a host of what-ifs and other assumptions and arguments is opened. Several papers have been presented that concluded most surfaces will readily adsorb three layers of water molecules. This value equates to a water adlayer thickness of approximately 10 angstroms, a depth more than sufficient to provide a medium for ionic residues to be mobilized. The water molecule is not simply a three-atom linear structure, but it is V-shaped with a 104° angle between the “legs.” Subsequently, the molecular model that forms will demonstrate significant polarity and create stronger intermolecular forces. This allows for the formation of macromolecules, adsorption phenomenon, mobilization of ions, etc., that can wreak havoc on device performance and reliability. All these phenomena warrant more discussion that is left unaddressed here in the interest of space and can be pursued in the Suggested References included at the end of this article. Within a few years of “Dating” the test method, RADC relented on its position of metal and/or ceramic only. Previously, die attach had been accomplished with solders, but now epoxy die attach was to be allowed as its pros greatly outnumbered the cons. This acceptance of nonmetals opened the door to allow other organic materials to be used as well. For example: Die coatings, PIND materials, RF absorbers, and moisture getters were gradually introduced to the menu. Unfortunately, this expanded list of acceptable options included moisture absorbing materials that had to be out gassed prior to sealing a device. Moreover, manufacturing engineers now had to consider the physical effect of the aspect ratio for moisture permeation through adhesively attached large die or other elements when pre-seal bake out was being done. As noted above, RADC committed to continuing its search for proving the accuracy of the moisture analysis via some standard. That effort was far from successful as some of the above molecular phenomena were not properly addressed. The net result was an annual report at the Minnowbrook Microelectronics Conference (an annual gathering of technologists that RADC started circa
edfas.org 13 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 1980 to address moisture in microelectronics issues) that indicated a total lack of confidence in the methodology. Test Method 1018 was being challenged for a variety of reasons. Not only were there differences in the mass spectrometers in use, but there were issues with the software and the retention of raw data. Differences in reported moisture contents were found to vary significantly as the manufacturers attempted to perform round-robin testing between the certified labs. As noted above, many manufacturing processes had to be upgraded. But even as the industries attempted to meet the 5000 ppm(v) limit specified by the test method, many analysts found that parts passing the reject criteria early on failed in later testing. By the mid-1980s, the scientific community was able to clarify some of the problems, one of which was hydrogen. At that time, a primary metal used for device fabrication was kovar (an iron, nickel, and cobalt alloy) as it had a thermal coefficient of expansion similar to that of the glass (Corning 7040 or 7056) feedthroughs. Unfortunately, the fabrication processes for kovar allowed mono-atomic hydrogen to be entrapped within the material. Furthermore, to protect the kovar from the effects of hostile environments (chemistry), the alloy had to be nickel and gold plated. These electrochemical processes cause various levels of hydrogen to be entrapped in the plating as well. Over time and temperature fluctuations in different applications, hydrogen will gradually diffuse though the base metal into the device cavity. The hydrogen entrapped in the plating will do likewise. The result is a hermetic cavity device with hydrogen entrapped inside where it will start a reduction process of the surface oxides and yield water. (Remember: “Chemistry happens.”) Not only did this in situ moisture create problems, but the diatomic hydrogen also became chemically active with the metal systems utilized by the RF community. This realization set off scores of hydrogen studies in an effort to identify the culprits that contributed the most hydrogen. These studies quickly reinforced the axiom that no two devices are truly identical as the hydrogen content of device elements within a given production lot were found to be significantly different. Lastly, but not nearly complete in this discussion, somewhere in this time frame the decision-makers at RADC concluded that acting as the Preparing Activity for the Military Specs was not in their charter. Hence, their technical support was withdrawn. Essentially, the suppliers and users were left on their own to find some means of proving the precision and accuracy of the instrumentation used to acquire moisture data. PROVING THE RELIABILITY OF THE RGA TEST PROTOCOL The beginning of the 21st century found the microeletronics community still mired in mistrust of RGA data, no solution to a lack of a moisture standard, a growing diversity of microelectronic devices, and gradual withdrawal of the Department of Defense in any attempt to resolve the issues. Throughout the decades, NASA remained on the sidelines as an observer, presenting its own needs and requirements only when needed. Fortunately, that changed, and in one of the annual Minnowbrook sessions a new approach to creating a standard was suggested and NASA personnel identified with the concept. The new approach was to present an identical sample to the various analytical labs measuring moisture content. It was to be done via one very large sample volume (in the sense that RGA sample requirements are extremely small) comprising a one-liter gas cylinder with small sample chambers between the values enclosing gas obtained from the main sample/cylinder. The thinking was that this shared cylinder approach would eliminate all questions about differences in makeup, process variations, gas composition, and aging. Furthermore, the very large single sample would be conveniently portable. NASA Goddard Space Flight Center funded the first stage of this effort. Over time, a stainless-steel ~1.5 liter cylinder was fabricated with shutoff valves on each end (Fig. 2). The ends of these valves were each fitted with a second valve, and the space between the two valves was to act as the sample volume. An opening and closing sequence for evacuation and backfill allowed one to sample the same volume over and over again. The single sample cylinder (SSC) was charged with nitrogen (99.99% purity) along with a nominal 5000 ppm(v) water via the NIST dew pointer. Additionally, the sample cylinder included a trace of argon that, when tested via RGA, provided additional insights into the hermeticity of the Fig. 2 The single sample cylinder for residual gas analysis.[4]
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 14 SSC over time. Over a hundred sample tests were analyzed as the proper sampling parameters and sequences were determined. Environmental and aging effects were assessed and storage conditions were also identified. The net result was that RGA sample data recorded from this sample source during any testing scenario had a precision of ±1.5% (i.e., ±75 ppm(v)). Having demonstrated that the SSC could deliver multiple samples with the same composition, the next phase of developing the standard was to test it at other laboratories. After one final series of analyses, the SSC was shipped to other certified laboratories. Each lab performed the required daily internal calibrations before taking sample tests from the SSC. A problem occurred when the SSC arrived at one facility with one of the valves broken off at the tank interface. NASA agreed to having the SSC repaired and to perform a recharge process using the same techniques used during the initial charging. Testing then continued and the final RGA assay at the originating lab once again yielded a precision of ±1.5%. Unfortunately, NASA was suddenly faced with a mandate to cease all R&D efforts. Funding was stopped, the SSC was put into storage, and the data was never assembled into a final report. Approximately seven years later, the Dept. of Energy (DOE) expressed interest in the effort and was willing to fund another series of SSC tests. Hence, the SSC was taken out of hibernation and was once again tested and retested. The performance was as before, i.e., no discernible change in the composition of the SSC contents. Even the argon content had barely shifted after years in storage. So again, after one final set of analyses, the SSC was transported (i.e., hand carried for “eyes on” purposes this time) to the various laboratories for RGA analysis. Even after long-term storage, newly performed RGA measurements demonstrated a precision of ±1.5%. A final report of the results was completed and forwarded to the DOE for their dissemination. In the 2024 Minnowbrook Conference, an overview of the results from this most recent SSC data was presented and compared in detail to the results of the previous two studies. Because discussions at Minnowbrook are open, but never published or released in any manner, a request was made by NASA/JPL to combine all the data from the three studies done over the twenty years into one report. That report is one of the references cited in the Suggested References. It summarizes the years of effort expended by a host of technologists in an effort to create a consensus standard for the RGA testing of moisture in microelectronic devices. CONCLUSION This article is a very simplified account of how Test Method 1018 for the determination of moisture in microelectronic devices evolved. The method has been demonstrated as reliable and provides a means by which different test laboratories can demonstrate their measurement capabilities using the same sample source. It should be noted that a large amount of additional historical information and details were intentionally set aside in this telling to keep things brief. Although references were not noted in the text, a few select citations listed below provide greater detail and insight into some of the above discussions for the interested reader. SUGGESTED REFERENCES 1. Test Methods and Procedures for Microelectronics, MIL-STD-883, U.S. Department of Defense. 2. P. wh Schuessler: “Moisture in Microelectronics: Physics and Chemistry of Volatile Species in Hermetic Electronic Devices,” Lulu Press, 2017. 3. J.E. Shelby: “Handbook of Gas Diffusion in Solids and Melts,” ASM International, 1996. 4. P. wh Schuessler and S.M. Sierzant: “The Development of a Consensus Standard for Moisture,” Microelectronic Devices, NASA Contract: 80NM0018D0004, Jan 2025. 5. T.J. Green and R. Lowry: “Why Three Monolayers of Moisture are Important,” TJ Green Associates LLC, white paper, 2016. ABOUT THE AUTHOR Philipp wh Schuessler did his undergraduate and graduate studies at the Rochester Institute of Technology. He started his career at IBM/FSD in 1963 and remained in that division until retirement 1996. Thirty years of consulting followed in the arena of failure analysis of microelectronic devices. His years of research and development, failure analysis, and materials analysis have essentially been centered around the effects of moisture in and on micro and macro devices. Schuessler served as chair of the Minnowbrook Microelectronics Conference for 42 years before retiring.
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edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 3 18 AUTOMATED END-TO-END AI SOLUTION FOR PHOTON EMISSION MICROSCOPY IN SEMICONDUCTOR FAILURE ANALYSIS Guofeng You, Silambarasan Karuppannan, Kan Sun, Wilson Lee Cheng Hoe, and Grace Tan Qualcomm Global Trading Pte. Ltd., Singapore gyou@qti.qualcomm.com EDFAAO (2026) 3:18-23 1537-0755/$19.00 ©ASM International® INTRODUCTION In semiconductor failure analysis (FA), rapid defect localization is critical for maintaining yield and reliability. Photon emission microscopy (PEM) serves as a standard technique, detecting photons emitted by defects in active circuitry under electrical bias.[1-3] However, continued scaling and increasing routing density make PEM interpretation harder: Emissions are often faint, scenes are congested, and comparison across operating conditions or revisions may require reviewing many frames with subtle differences. As a result, PEM remains a frequent throughput bottleneck in practical FA workflows. In many labs, PEM analysis is still dominated by manual inspection and judgment. This introduces three recurring issues: (1) The process is labor‑intensive and difficult to scale for high‑throughput demand; (2) Interpretation varies across analysts and sessions—especially for weak or ambiguous hotspots; and (3) Correlating image-space findings to CAD/GDS layout context is often disjointed, requiring repeated context switching between imaging tools and layout viewers, which increases cycle time and error risk. Similar automation motivations have been reported for other FA imaging modalities, including lock‑in thermography[4] and inspection/characterization techniques such as SEM and CSAM[5,6]—highlighting the value of repeatable, algorithmic triage in image‑ driven diagnosis. To address these limitations, this article presents an end-to-end AI application for PEM analysis that integrates three capabilities into a single user workflow: automated hotspot detection, quantitative reference‑to‑target comparison, and layout correlation (Fig. 1). The goal is not only to detect hotspots, but to support FA decision‑ making by ranking changes between conditions and translating pixel‑space observations into design context. Building on advances in computer vision and deep learning for microscopy and defect localization, the system is engineered for day‑to‑day use with an intuitive interface and traceable outputs. The remainder of this article describes the detection model, comparison and correlation methodology, and practical results from internal evaluations. METHODOLOGY AND RESULTS AI TRAINING STRATEGY The AI methodology addresses the unique challenges of PEM image analysis through a comprehensive training strategy. The dataset comprises tens of thousands of TIFF images extracted from historical FA databases, captured Fig. 1 End-to-end PEM AI solution workflow showing the integration of hotspot detection, comparison analysis, and layout correlation with optional Avalon system integration.
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