edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 34 ISTFA 2025 SYSTEM IN PACKAGE (SIP) USER GROUP Chair/Co-Chairs: Chandu Tanukonda, Jer O’Sullivan, and Wen Qiu hemachandar.tanukonda.devarajulu@intel.com, jer.osullivan@analog.com, wen.qiu@amd.com The System in Package (SIP) User Group hosted a productive lunchtime session at ISTFA 2025, bringing together industry experts to discuss the significant challenges and potential solutions in SIP failure analysis. The interactive event featured a keynote address and live polls to stimulate active engagement between the panel and audience. The session began with a keynote from Susan Li of Marvell Technology, who shared her insights into developing advanced tools for analyzing failures in complex IC devices, including 2.5D/3D packaging. She noted that SIP integration offers advantages like enhanced signal integrity and reduced power usage but introduces new FA difficulties, particularly with limited access due to backside power delivery and the need for FIB-assisted e-beam probing. Li stressed the critical nature of design for FA/FI/ debug for successful root cause analysis. Following the keynote, the discussion centered on design for FA/test and fault isolation. Under design for FA/ test, Jer O’Sullivan highlighted the necessity of integrating design-for-test principles, especially for SIPs containing diverse mixed-signal components. Chandu Tanukonda further emphasized that robust design is essential for heterogeneous integration and chiplet-based architectures, “THE CONSENSUS WAS A CLEAR CALL FOR TIGHTER COLLABORATION BETWEEN VENDORS, UNIVERSITIES, AND FA ENGINEERS TO COLLECTIVELY OVERCOME THE MULTIFACETED OBSTACLES IN SIP FI-FA.” noting that access to all component test and assembly data is crucial. Under Fault Isolation (FI), Wen Qiu led a discussion on sample preparation-free FI techniques for precise defect identification on multi-stacked HBM memory die. In conclusion, participants advocated for standardizing design for FA across different SIP architectures, suggesting a potential white paper would be useful. O’Sullivan noted that associated bench test hardware needs to be developed in parallel with SIP design. The consensus was a clear call for tighter collaboration between vendors, universities, and FA engineers to collectively overcome the multifaceted obstacles in SIP FI-FA. NOTEWORTHY NEWS CAM-WORKSHOP 2026 The 13th CAM-Workshop on Failure Analysis and Material Diagnostics for Electronic Components will take place on May 19-20 in Halle, Germany. The CAM-Workshop brings together experts from the electronics industry and materials diagnostics equipment manufacturers. The goal is to discuss challenges, and future requirements in the field of failure analysis and materials characterization of electronic devices, sensors, and systems. The event includes oral presentations as well as an industrial exhibition. For more information, visit cam-workshop.de.
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