A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS FEBRUARY 2026 | VOLUME 28 | ISSUE 1 ELECTRONIC DEVICE FAILURE ANALYSIS edfas.org A STEP TOWARD AUTOMATION IN FAILURE ANALYSIS ENHANCING SOFT DEFECT LOCALIZATION HIGHLIGHTS FROM ISTFA 2025 ADVANCED FA USING IN-SITU AFM IN FIB-SEM 3 16 11 22
A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS FEBRUARY 2026 | VOLUME 28 | ISSUE 1 ELECTRONIC DEVICE FAILURE ANALYSIS edfas.org A STEP TOWARD AUTOMATION IN FAILURE ANALYSIS ENHANCING SOFT DEFECT LOCALIZATION HIGHLIGHTS FROM ISTFA 2025 ADVANCED FA USING IN-SITU AFM IN FIB-SEM 3 16 11 22
DESIGN FOR DEBUG: INTEGRATING FA INTO FUTURE TECHNOLOGIES Abstract submission deadline: April 3, 2026 CALL FOR PAPERS NOW OPEN! OCTOBER 4–8, 2026 HENRY B. GONZALEZ CONVENTION CENTER, SAN ANTONIO, TEXAS Traditionally, failure analysis has often been treated as an afterthought in chip design. However, as architectures grow more complex and increasingly difficult to debug, it’s essential to integrate diagnostic capabilities from the outset. Let’s define proactive strategies that position us for success when qualifying the most advanced packages and emerging technologies. Come to share your experiences and advance the industry and your career at the International Symposium for Testing and Failure Analysis, the premier event for the microelectronics failure analysis community. We invite you to submit your work for publication and to present it to the community in San Antonio, Texas, for the 52nd year of ISTFA. • Standardize debug protocols for GAA, chiplets, stacked die, backside power, high-speed I/Os, and emerging silicon photonics • Leverage AI for smarter fault isolation, and to enable faster/better fault diagnosis results • Collaborate across teams—FA, design, test, and tool vendors—to tackle emerging tech challenges using unified, rather than independent, approaches • Emerging FA Techniques and Concepts • Die Level Fault Isolation • Package Level Fault Isolation • System-in-Package and 3D Devices • Wide Bandgap Power Devices (SiC, GaN, new materials) • AI Applications for Failure Analysis • Boards and Systems • Sample Preparation and Device Deprocessing • Discuss embedding FA-specific features like CAD alignment cells, routing internal nodes for e-beam and active-nanoprobe accessibility, and adding on die sensors for real-time monitoring of power and speed path measurement • Utilize big data and dynamic testing to pinpoint yield issues earlier in technology introduction phase • Original, unpublished, and novel material is being solicited on testing, analysis, characterization, and metrology of electronic devices and systems from the nanoscale and upward. • Case studies, review papers, and non-commercial work from vendors are encouraged. Paper selection is based entirely on information submitted in abstracts and will be evaluated on novelty, completeness, quality, and benefit to the FA community. Abstracts should be a minimum of two pages long, including images and figures. References are required. Original, unpublished abstracts are solicited in the following topic areas: • FIB Sample Preparation and Circuit Edit • Microscopy Analysis and Materials Characterization • Case Studies: Device Analysis • Case Studies: FA Process and Workflows • Product Yield, Test, and Diagnostics • Silicon Photonics and Co-Packaged Optics • Trusted Electronics
edfas.org 1 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 ABOUT THE COVER The image shows a burning event that looks like a flaming horse created by simulating the customer reported failure on a board-level product through mechanically damaging a surface-mount capacitor and powering up the module with high supply current limit. Photo by Ruel Angelo Agpaoa, Analog Devices Inc., First Place Winner in Color Images, 2025 EDFAS Photo Contest. A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS FEBRUARY 2026 | VOLUME 28 | ISSUE 1 edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS DEPARTMENTS Advanced Semiconductor Failure Analysis using In-Situ AFM in FIB-SEM Radek Dao, Ondřej Novotný, Veronika Hegrová, Rosalinda Ring, and Jan Neuman To address the limitations of traditional workflows, this work introduces a correlative, in-situ methodology that integrates atomic force microscopy directly into the vacuum chamber of a scanning electron microscope or focused ion beam. Author Guidelines Author guidelines and a sample article are available at edfas. org. Consult the guidelines prior to manuscript preparation. 3 11 2 GUEST EDITORIAL Ingrid De Wolf 28 ISTFA PANEL & USER GROUP SUMMARY 35 WEFA 2025 ISTFA SESSION WRAP 37 SILICON VALLEY FA WORKSHOPS SUMMARY 39 2025 EDFAS AWARD WINNERS 40 2026 EDFAS AWARDS 41 BOARD OF DIRECTORS NEWS Chris Richardson 42 CALL FOR NOMINATIONS Felix Beaudoin 43 DIRECTORY OF FA PROVIDERS Rosalinda Ring 45 LITERATURE REVIEW Michael R. Bruce 46 PRODUCT NEWS Ted Kolasa 48 TRAINING CALENDAR Rosalinda Ring 50 GUEST COLUMN Lun Chan and Phil Kaszuba 52 ADVERTISERS INDEX Enhancing Soft Defect Localization with SAILS and Array-based Image Reconstruction Arun Karunanithi, Benny Hsu, Kent Erington, Joseph Caroselli, Winston Gao, Calder Wilson, and Aaron Liao This article shows the successful implementation of software automated intelligent laser scanning (SAILS) and shows its ability to judiciously mask out sites in real-time and use this mask to modulate laser dwell time. 16 For the digital edition, log in to edfas.org, click on the “News & Magazines” tab, and select “EDFA Magazine.” A Step Toward Automation in Failure Analysis by FIB-SEM 3D Tomography and AI Segmentation Pascal Limbecker, Rong Wu, Thomas Woyack, Heiko Stegmann, Daniel Plencner, and Roland Salzer This article looks at ways to automate FIB-SEM slice and view, dataset post-processing and visualization, and automated defect detection. 11 3 22 16 ISTFA 2025 Highlights A recap of the ISTFA 2025 event includes General Chair Renee S. Parente’s wrap-up as well as a list of the winning ISTFA papers and posters. 22
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 2 I am writing this guest editorial just a few days after returning from the International Symposium for Testing and Failure Analysis (ISTFA) 2025. Once again, it was an outstanding edition—featuring high-level papers and tutorials, excellent user group sessions, a vibrant exhibition, and countless networking opportunities. It was wonderful to reconnect with many FA colleagues and make new friends along the way. If you work in the field of failure analysis, whether you are just starting out or already an expert, I strongly recommend attending this conference. For me, ISTFA 2025 was bittersweet, as it was most likely my last attendance. If all goes as planned, I will retire on July 1, 2026. My first ISTFA experience dates back to 1997. Around 1995, imec acquired a photon emission spectroscopy (PEM) tool, which we primarily used for research on single devices such as locating high-resistive spots in TiSi2 lines or pinpointing breakdown positions in micron-wide capacitors and transistors. Together with my Ph.D. student Mahmoud Rasras, now a professor at NYU Abu Dhabi, we developed a simple system for PEM. Christian Boit, FASM, and his group had already introduced the concept of photon emission spectrum analysis in 1992 using filters.[1] Later, Liu et al.,[2] added a separate spectrometer and detector to obtain a continuous spectrum. We simplified the idea by inserting a prism between the PEM microscope and a movable detector and presented this spectroscopic photo emission microscope (SPEMMI) system at ISTFA 1997. I immediately fell in love with the conference. At that time, my main research focus was Raman spectroscopy (RS) for measuring stress induced by local oxidation processes in silicon (remember LOCOS and LOPOS). This work brought me back to ISTFA in 1998, where I presented a paper on the correlation between mechanical stress (measured by RS) and defects caused by shallow trench isolation. From then on, I was hooked. ISTFA became a place where I learned immensely, expanded my network, and gradually became involved in its organization. As my research group at imec grew, we ventured into MEMS testing and reliability—and naturally, failure analysis—giving me the chance to attend ISTFA’s MEMS sessions. I contributed to the first chapter on MEMS FA for the EDFAS Microelectronics Failure Analysis Desk Reference and had the honor of chairing a lively panel discussion: “Is training the failure analysts failing?”—a question that remains relevant today. Between 2003 and 2005, I delivered tutorials on MEMS FA and chaired MEMS sessions. Over the years, I met countless amazing people—too many to name here—but I must make one exception for Ted Lundquist; always kind and helpful, who sadly is no longer with us. FEBRUARY 2026 | VOLUME 28 | ISSUE 1 A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS ELECTRONIC DEVICE FAILURE ANALYSIS GUEST EDITORIAL THREE DECADES AT ISTFA: A JOURNEY OF LEARNING AND NETWORKING Ingrid De Wolf, FASM, imec and KULeuven ingrid.dewolf@imec.be edfas.org (continued on page 38) PURPOSE: To provide a technical condensation of information of interest to electronic device failure analysis technicians, engineers, and managers. Nicholas Antoniou Editor/KLA nicholas.antoniou@kla.com Joanne Miller Senior Editor Victoria Burt Managing Editor Allison Freeman Production Supervisor ASSOCIATE EDITORS Navid Asadi University of Florida Guillaume Bascoul CNES France Felix Beaudoin GlobalFoundries Michael R. Bruce Consultant Jiann Min Chin Advanced Micro Devices Singapore Michael DiBattista Varioscale Inc. Rosine Coq Germanicus Universitié de Caen Normandie Szu Huat Goh Qualcomm Jason Holm NIST Ted Kolasa Northrop Grumman Space Systems Joy Liao Nvidia Corp. Rosalinda M. Ring NenoVision Tom Schamp E-Space David Su Yi-Xiang Investment Co. Martin Versen University of Applied Sciences Rosenheim, Germany FOUNDING EDITORS Edward I. Cole, Jr. Sandia National Labs Lawrence C. Wagner LWSN Consulting Inc. GRAPHIC DESIGN Jan Nejedlik, jan@designbyj.com PRESS RELEASE SUBMISSIONS magazines@asminternational.org Electronic Device Failure Analysis™ (ISSN 1537-0755) is published quarterly by ASM International®, 9639 Kinsman Road, Materials Park, OH 44073; tel: 800.336.5152; website: edfas. org. Copyright © 2026 by ASM International. Receive Electronic Device Failure Analysis as part of your EDFAS membership. Non-member subscription rate is $175 U.S. per year. Authorization to photocopy items for internal or personal use, or the internal or personal use of specific clients, is granted by ASM International for libraries and other users registered with the Copyright Clearance Center (CCC) Transactional Reporting Service, provided that the base fee of $19 per article is paid directly to CCC, 222 Rosewood Drive, Danvers, MA 01923, USA. Electronic Device Failure Analysis is indexed or abstracted by Compendex, EBSCO, Gale, and ProQuest. De Wolf
edfas.org 3 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 EDFAAO (2026) 1:3-10 1537-0755/$19.00 ©ASM International® A STEP TOWARD AUTOMATION IN FAILURE ANALYSIS BY FIB-SEM 3D TOMOGRAPHY AND AI SEGMENTATION Pascal Limbecker1, Rong Wu1, Thomas Woyack1, Heiko Stegmann2, Daniel Plencner2, and Roland Salzer2 1GlobalFoundries LLC & Co. KG, Dresden, Germany 2Carl Zeiss Microscopy GmbH, Munich, Germany pascal.limbecker@globalfoundries.com INTRODUCTION In the competitive high-volume semiconductor foundry business, yield, quality, and cost are key to gaining competitive advantage. In addition to in-line metrology and defect scanning, mass failure analysis of base line product wafers is important to generate defect Pareto charts for continuous yield improvement, by eliminating the major yield detractors. Hundreds of short or leakage failures, localized by optical beam induced resistance change (OBIRCH) or photon emission, plus several thousands of bitmap and logic failures are analyzed using FIB-SEM slice and view or top-down polishing and SEM inspection every year, requiring lots of manpower and tool time. Over the past decades, visitors to FA laboratories have often asked operators if they could imagine a computer taking over their job. The typical answer was: “No, you need the human eye and mind to detect a defect.” However, the evolution of automation, artificial intelligence, deep learning, and improved FIB-SEM performance has changed the mindset. Operators can navigate to the area of interest using CAD alignment on full wafers, wafer pieces, or single dies. Enabling bitmapping (memory) and scan diagnosis (logic) narrows down the failure location to a small area for slice and view application. OBIRCH, photon emission, or lock-in thermography also provide a precise failure location. Because top-down inspection by delayering multiple dies is very time consuming, further physical analysis is done by manual FIB slice and view. The maximum area to be investigated is typically not larger than 15 × 15 µm2, and is usually smaller. The direction of the cut must be decided because it is not known in which layer the defect is located and there is a risk that the defect will be missed in the selected direction.[1] AUTOMATED FIB-SEM SLICE AND VIEW Recent FIB-SEM improvements allow for acquiring a series of images of the target volume fully automatically. Using such FIB-SEM tomography data for root cause analysis at defect sites isolated by volume diagnosis techniques has been demonstrated.[1] In the case study of logic failure presented here, the failure area was reduced to 10 × 10 µm² through scan diagnosis. A FIB-SEM tomography dataset was acquired in a ZEISS Crossbeam 550L FIB-SEM, using Atlas 3D software, which is capable of autofocus, autostigmation, and ROI centering using special fiducial patterns[2] in an ion beam deposited platinum and carbon layer sandwich (Fig. 1). The data acquisition extended over the entire area of 10 × 10 µm2 to 5 µm depth. Nominal FIB slice thickness was set to 5 nm. High resolution SEM imaging of each slice was done at 5 nm pixel size on a 10 × 1 µm2 sub-area covering the complete layer stack. Both secondary electron (SE) and backscattered electron (BSE) data were stored simultaneously. Slice thickness variations and lateral drifts during data acquisition can lead to distortions of the sample structures in the dataset. To counteract, the fiducials serve as references for periodic slice thickness and drift correction.[2] Data acquisition took 15:30 h. Traditional slice and view inspection of the defect would have taken an estimated 2 to Fig. 1 Fiducial patterns on the top region of interest.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 4 3 hours. However, unattended tomography data acquisition maximizes tool utilization. DATASET POST—PROCESSING AND VISUALIZATION After acquisition, all sequential images must be registered perfectly to create a precise 3D model. Translational alignment by cross-correlation to remove residual image to image drifts was applied. Using the slice thicknesses measured during acquisition, a constant slice thickness of 5 nm was interpolated. The final dataset consisted of 1702 SE and 1702 BSE images of 1987 × 408 pixels each. The quality of the dataset can be assessed in all directions from virtual slices extracted in XZ and YZ directions and is impressive. The virtual top-down image in XZ direction (Fig. 2) showing a pattern defect in M1 can hardly be distinguished from a top-down image acquired after delayering by manual polishing or PFIB. For better data interpretation by process engineers, a 3D visualization is helpful. A prerequisite for such visualization is a segmentation of individual structures. This is straightforward with artificial intelligence-based segmentation.[3] It consists of defining a number of segmentation classes, then annotating a limited number of training images according to these classes, training the model on these annotations, and finally using the model to segment the full dataset or other datasets acquired with the same conditions. Ten classes were annotated in 25 tomography images: metal layers M1 to M5, Si substrate, contacts, NiSi and poly-Si; everything else as background. These annotations were then used to train a segmentation model in 1200 epochs. Annotation and model training was done with the ZEISS Arivis Cloud service. It uses a U-net with EfficientNet B0 as encoder and Pixelshuffle as decoder.[4,5] The learning rate was 3e-4 for the first 70% of epochs and 4e-5 for the remainder. Batch size was 3. The algorithm returns several quality measures, intersection over union (IoU) was specified as 0.8. For segmentation of the full dataset with the model and for visualization, ZEISS Arivis Pro desktop software was used. The result contained spurious small, artifactual segments. They were removed by filtering out segments with unrealistically small volumes. A volumetric rendering of the dataset and of the segments is shown in Figs. 3a and b. The segmented M1 layer with the defect is shown in Fig. 4. Applying the model to another dataset obtained from a different sample with similar open interconnect defect produced too many artifacts, indicating that the model did not yet generalize well enough to be applicable to different datasets. In this case study, data acquisition time was long (a) (b) Fig. 2 Virtual XZ top-down image of first metal layer showing a defect in the center marked by a red oval, extracted from the post-processed BSE dataset. Fig. 3 Volumetric 3D renderings of (a) BSE dataset and (b) AI-based. Si substrate not shown.
edfas.org 5 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 compared to manual slice and view. However, total acquisition time is determined by the ratio of voxel size to volume imaged and can be reduced by taking more information about the defect into consideration: The more precisely the defect location is known, the more the acquisition volume can be reduced. If the defect size is roughly known, the voxel size can be increased to minimize acquisition time while maintaining sufficient 3D resolution. In hindsight it is estimated that the acquisition time may have been reduced to below 3 h without compromising the information content of the data. AUTOMATED DEFECT DETECTION The next step toward automation is automated defect detection. For 2D electron microscopic images, automatic defect finding is a current field of research, but the authors are not aware of existing work on automatic defect localization in 3D FIB-SEM tomography data of semiconductor devices.[6] Various aspects and challenges of the topic are highlighted here. Finding a defect of known nature, but unknown shape and size in a complex 3D interconnect structure is more challenging than typical 2D applications, such as the classification of different defect categories in SEM images of interconnect line arrays.[7] As in the 2D case, reference-based and reference-free methods can be consid- ered, further subdivided into conven- Fig. 4 3D rendering of AI-based segmentation of M1 layer. In the center, the defect is visible. Fig. 5 Top: cross-section SEM image. Bottom: CAD image from same location. Fig. 6 Method A: Mean gray values of each image in the tomography (red) and CAD datasets (blue), plotted over slice number, for XY, YZ, and XZ slices. Gray rectangles highlight slice ranges with the defect.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 6 tional, machine learning or deep learning methods. The comparison of experimental and reference volume may be made on the 2D slices or directly on the 3D structures. This article explores reference-based data processing with conventional slice-by-slice comparison and with deep learning. Comparing the experimental dataset with a second, defect-free one would be excessively time-consuming, as the sample region investigated is a different one in most cases. Instead, 2D CAD layout images of the same volume are extracted and used as ground truth, to detect defects by searching for structural differences between the expected (CAD) and the measured data (Fig. 5). Slice-to-slice comparison of datasets requires matching slices with identical structural content, excluding defects. Mismatches in position, scale, or skew can be misinterpreted as defect signatures. Affine registration can align datasets in 3D but is insufficient if real device structures deviate from their layout in scale, shape, and position. Consequently, elastic registration using optical flow was employed for better adaptation of CAD to experimental. Careful adjustment of registration parameters is crucial to prevent deforming reference structures to mimic defect shapes. After registration, a 3D median filter (2 pixel) was applied to the experimental volume to reduce noise. Following binarization by gray value thresholding, spurious noise up to 3 pixels was removed. Finally, 2-pixel erosion was performed to reduce structure sizes to CAD structure widths. Defect signature detection was explored using three gray value-based methods: A) Comparing mean gray values within each slice pair; B) Calculating cross-correlations between each slice pair. Both A and B were applied to the XY, YZ, and XZ slices; C) Performing image arithmetic with the CAD data mask-ing structures in the experimental data. Method A, shown in Fig. 6, plots mean gray values for XZ, XY, and YZ slice pairs against slice number. Within the expected slice ranges, no significant difference is observed between experimental and reference. This is consistent with cross-correlation analysis (method B), where Fig. 7 shows normalized cross-correlation error over slice number without deviations attributable to the defect. The reason for the lack of a defect signa- ture with these methods becomes clear look- ing at the difference between two slices. Figure 8 shows the difference between an XZ slice from the FIB-SEM dataset extracted at the M1 layer containing the defect, and its CAD counterpart. It is evident that despite extensive post-processing, the contribution of the defect to the gray value distribution is small. Real structures not perfectly matching reference structures and residual image registration errors outweigh the effect of the defect on mean gray values. Method C continued with the difference between binarized measured data and CAD (Figs. 9a-d). To get rid of ghost structures due to deviations between experimental and layout data, it was assumed that the CAD ground truth represents a Fig. 7 Normalized cross-correlation error between each tomography slice of the FIB-SEM and the corresponding CAD slice, plotted over slice number, for XY, YZ, and XZ slices. Gray rectangles highlight slice ranges with the defect.
edfas.org 7 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 minimum subset of the experimental data in terms of structure sizes. In other words, wherever the CAD data shows structure, a corresponding structure is found in the measured data, unless there is a defect of type “missing structure.” Hence, where the CAD is not predicting anything, the data can be ignored. This was achieved by multiplication of each difference image with the corresponding CAD image. The result is shown in Fig. 9e. After dilation and erosion to remove remaining small artifacts and noise, the defect is segmented (Fig. 9f). Figure 9g shows an overlay of the experimental image with the defect mask. This simple approach provides good results. The reconstructed XY-view shows the found defect areas marked in red (Fig. 10). Some false positives are visible, but it would be easy to ignore them in a subsequent automation step. Note that this algorithm only works for the defect class “opens,” and not for additional features not in the CAD, such as particles. For further automation of the method, feedback loops using AI models are a promising approach for better registration. (a) (b) (c) (d) (e) (f) (g) Fig. 8 Difference between two corresponding XZ slices from the M1 layer of both datasets, showing the defect (compare with Fig. 2). Fig. 9 Image processing steps to detect a defect in the tomography image stack. (a) raw, (b) binarized BSE image, (c) CAD slice, (d) difference between (b) and (c), (e) shows (d) multiplied with (c), (f) shows (e) after erosion and dilation, and (g) overlay of (a) (aqua) and (f) (red). Fig. 11 Normalized aspect ratios of experimental (red circles) and CAD layout segments (blue squares) plotted against their normalized volume. Two outlier points marked by a red circle belong to the two halves of the open interconnect. Fig. 10 Detail of a virtual top-down image of first metal layer showing a defect in the center, extracted from the post-processed dataset in XZ.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 8 Nevertheless, the method should be robust against deviations of sample versus CAD layout, but still sensitive to deviations caused by defects, without extensive data pre-alignment. To this end, a deep learning-based method was explored: Method D) Using a pre-trained feature extractor to find differences in higher-level image features. The key challenge is selecting features that are invariant to deviations between actual structures and reference design, while remaining sensitive to defects. Method D did not yield results different from the conventional approaches A and B. Deviations between actual structures and reference design are also evident in such higher-level image features. The feature extractor would need to be finetuned with supervision indicating expected deviations, and defects. Another possible approach would be to apply a feature detector or image arithmetic to synthetic data generated from the CAD by a 2D image-to-image GANs[8] that learned to generate ghost structures not present in the CAD data. This approach is reserved for future work. Finally, yet another method was investigated: Meth- od E) Using a deep learning-based segmentation model to analyze geometric relationships between different segments. The idea is that features such as remaining segments of an open interconnect should be discernible from intact interconnects in the same layer by inspecting properties such as segment aspect ratio and volume relations. This would allow reference-free defect detection if the pristine distribution of the analyzed segment properties is known. As this was not the case here, a reference was used by segmenting the corresponding layout image stack as well, then comparing segment properties from both datasets. Training a segmentation model on the binary CAD images annotated for the same ten classes as with the experimental dataset resulted in a lower IoU of 0.7 (25 training images, 1200 epochs). Segmentation of the full CAD image stack with this model resulted in segmentation artifacts partly too large to be removed by filtering. Improving this would require adding more annotated images to the training data, which is reserved for future work. To explore method D with the available data, the segmentation classes were reduced to only two: all metal layers and background. Training with these reduced annotations resulted in an IoU of 0.96 (experimental) and 0.99 (CAD). Segmentation of the full CAD dataset with this simplified model was artifact-free, providing 138 M. Segmentation of the experimental dataset with its simplified model provided a very good result with small erroneous segments that were filtered out, resulting in 138 M1 segments. Such filtering can be avoided in future work by appropriate noise filtering before segmentation. Method E showed potential for automatic defect detection. Figure 11 shows a scatter plot of M1 segment aspect ratios against volume, both normalized to their maximum values, each dot corresponding to a segment. Two outliers can be identified. Figure 12 presents a view of the M1 segmentation of the CAD data, and Fig. 13 shows the experimental dataset. Here the segments corresponding to the outliers are marked—the two remaining halves of the open interconnect. Outliers in the distributions of experimental segment properties, which are not present in the layout data, indicate defects. At least in this case, where the defect type (open interconnect) was known from the initial logic analysis. The distributions in Fig. 11 differ in detail due to the discrepancies between layout and sample. Therefore, finding incomplete interconnects by visual inspection of the scatter plots is difficult. However, with improved Fig. 13 3D rendering of the segmented M1 layer of the layout, colored by segment volume. Fig. 12 3D rendering of the segmented M1 layer of the experimental dataset, colored by segment volume. Open interconnect halves corresponding to the outliers in Fig. 10 are highlighted.
edfas.org 9 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 segmentation using more training data, it should be possible to exploit all differences between experiment and reference by suitable algorithmic comparison of distributions. Yet another reference-free approach to be investigated in the future is directly classifying open and intact interconnects in the experimental dataset, like the approach used in reference 3. CONCLUSION The results achieved with automated slice and view 3D tomography dataset using the latest generation of FIB-SEM systems in combination with ZEISS Atlas 3D software are quite impressive. Virtual slicing in all directions, especially the top-down view, significantly helps to interpret defect type and find root cause. In addition, auto slice and view can save resources and maximize the tool utilization, e.g., overnight or over the weekend. An automated defect detection using the recorded tomography dataset is much more challenging than expected. The five approaches based on comparison with CAD data: A, B, C (conventional gray-value based) and D, E (deep learning-based methods) so far are not yet capable of reliably identifying defects without extensive data preprocessing or manual data exploration. This can be attributed to the inherent structural disparities between the CAD and FIB-SEM data sets. In future work, more training data is needed to improve deep learning segmentation and refine the models. Nevertheless, the necessary hardware and software are available, and sufficient computing power is in place for model training. It is only a matter of time before automation in failure analysis becomes a reality. The authors agree with a statement from David Albert: “Use computer power versus people power to solve problems. Save the people power for the difficult signatures (problems).[9]” ACKNOWLEDGMENTS This article was also presented at ISTFA 2025. REFERENCES 1. D. Mello, et al.: “New Approach in Physical Failure Analysis Based on 3D Reconstruction,” Proc. Int. Symp. Test. Fail. Anal., 2022, p. 201-205, doi.org/10.31399/asm.cp.istfa2022p0201. 2. H. Stegmann and A. Laquerre: “FIB-SEM Tomography Acquisition and Data Processing Optimization for Logic and Memory Structures,” Proc. Int. Symp. Test. Fail. Anal., 2023, p. 387-392, doi.org/10.31399/ asm.cp.istfa2023p0387. 3. H. Stegmann and F. Cognigni: “Few-Shot AI Segmentation of Semiconductor Device FIB-SEM Tomography Data,” Journal of Failure Analysis and Prevention, 25, 2025, doi.org/10.1007/ s11668-025-02203-w. 4. M. Tan and Q.V. Le: “EfficientNet: Rethinking Model Scaling for Convolutional Neural Networks,” Proc. Int. Conf. Machine Learning, 2019, proceedings.mlr.press/v97/tan19a.html. 5. A.P. Aitken, et al.: “Checkerboard Artifact Free Sub-pixel Convolution: A Note on Sub-pixel Convolution, Resize Convolution, and Convolution Resize,” 2017, doi.org/10.48550/arXiv.1707.02937. 6. E. Dehaerne, et al.: “Electron Microscopy-based Automatic Defect Inspection for Semiconductor Manufacturing: A Systematic Review,” Journal of Micro/Nanopatterning, Materials, and Metrology, 24(2), p. 020901. 7. S. Choi, et al.: “Machine Learning Based SEM Image Analysis for Automatic Detection and Classification of Wafer Defects,” SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2024, p. 1-4, doi.org/10.1109/ASMC61125.2024.10545512. 8. P. Isola, et al.: “Image-to-Image Translation with Conditional Adversarial Networks,” Nov 2018, doi.org/10.48550/arXiv.1611.07004. 9. D. Albert, et al.: “Yield Basics for Failure Analysts,” Tutorial presented at ISTFA 2024, doi.org/10.31399/asm.cp.istfa2024tpb1. ABOUT THE AUTHORS Pascal Limbecker received his diploma in electrical engineering at the University of Applied Sciences in Zwickau, Germany in 2005. Immediately afterwards, he began his career as failure analysis engineer at AMD Saxony, Germany. With the transition to GlobalFoundries in 2009, he has more than 20 years of experience in defect localization using OBIRCH, lock-in thermography, photon emission, nanoprobing, circuit editing, and chip modification using FIB-SEM tools. He is currently a principal member of technical staff and the technical lead engineer in the FA Lab at GlobalFoundries in Dresden, Germany. Rong Wu received her Ph.D. in physical chemistry from Freie Universität Berlin, Germany, in 2024. Following her doctoral study, she pursued postdoctoral research at Helmholtz Zentrum Berlin, working on memristive devices for neuromorphic applications. In 2025, she joined GlobalFoundries, Dresden, Germany, as a failure analysis engineer. Her current work focuses on FIB-SEM failure analysis of memory and logic devices. Heiko Stegmann studied physics and worked on his doctorate at the University of Heidelberg, Germany, 1990-1998, specializing in analytical TEM for biophysics applications. He did his post-doc in 3D TEM of motor proteins at the Max Planck Institute for Medical Research, Heidelberg, Germany, 1998-2000. Stegmann was a senior materials analyst at AMD
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 10 Saxony LLC & Co. KG, Dresden, Germany, from 2001 to 2004, working on physical failure analysis and process development support, as well as TEM characterization method development. Since 2004, he has been an application expert and advisor at Carl Zeiss Microscopy GmbH, Oberkochen, Germany, with emphasis on characterization of nanostructures for failure analysis and manufacturing process development, using techniques such as SEM, FIB, STEM, EDX, FIB-SIMS, and working on the company’s continuous improvement efforts. Daniel Plencner is a computer vision scientist in Corporate Research & Technology at Zeiss. He develops algorithms for 3D volumetric and surface data, covering anomaly detection, segmentation, and registration. Before joining Zeiss, he worked on 3D computer vision at ZF Group. Plencner holds a Ph.D. in physics from LMU Munich and conducted post-doctoral research at Sorbonne University and École Normale Supérieure in Paris. Roland Salzer received his diploma in physics at the University of Leipzig in 2006. From 2007 to 2011, he worked as research assistant at the IWM in Halle focusing on the improvement of FIB-SEM microscope application and workflows. In 2011, he joined Carl Zeiss Microscopy GmbH as an applications specialist for crossbeams and in 2013 he became the product manager for electron microscopy control software. In 2016, Salzer joined Sinus Messtechnik GmbH as the assistant manager responsible for national and international sales activities, product developments and certifications, HR, and production. In 2019, he rejoined Zeiss as a Solution/External Product Manager for electron microscopes at Industrial Quality Solutions. Since 2021, he has been the team leader at the Software Solutions Lab EM at Carl Zeiss Microscopy GmbH providing customized software solutions for electron microscopes and crossbeams focusing on the automation of complex workflows. NOTEWORTHY NEWS IRPS 2026 The IEEE International Reliability Physics Symposium’s (IRPS) annual conference will be held March 22-26 in Tucson, Ariz. The IRPS technical program includes technical sessions, keynotes, and invited talks on emerging issues, tutorials, workshops, poster sessions, a year-in-review seminar, and equipment demonstrations. IRPS 2026 is soliciting increased participation in the following areas: new materials, 3D packaging and heterogeneous integration, data center reliability, and more. The IRPS Conference is sponsored by the IEEE Reliability Society and IEEE Electron Devices Society. For more information, visit the IRPS website at irps.org. FIB SEM MEETING 2026 The 18th annual FIB SEM Meeting, to be held April 8-9, at the Kossiakoff Center at Johns Hopkins Applied Physics Laboratory in Laurel, Md. The 2026 FIB SEM will feature presentations, tutorials, and posters by FIB users and vendors, highlighting new applications and the latest technology. The event offers plenty of technical content as well as opportunities for informal discussions with FIB colleagues. Continuing this year will be student awards for best oral and poster presentations. Abstract submission deadline is March 1. For more information, visit fibsem.net or email keana.scott@nist.gov.
edfas.org 11 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 ADVANCED SEMICONDUCTOR FAILURE ANALYSIS USING IN-SITU AFM IN FIB-SEM Radek Dao, Ondřej Novotný, Veronika Hegrová, Rosalinda Ring, and Jan Neuman NenoVision sro, Brno, Czech Republic radek.dao@nenovision.com EDFAAO (2026) 1:11-13 1537-0755/$19.00 ©ASM International® INTRODUCTION As the semiconductor industry moves toward advanced nodes and complex 3D architectures, failure analysis (FA) must respond with improved spatial resolu- tion, analytical sensitivity, and localized data correlation. Traditional workflows often fall short due to timeconsuming inter-instrument transfers, environmental contamination risks, and poor contextual continuity. To address these limitations, the authors introduce a correlative, in-situ methodology that integrates atomic force microscopy (AFM) directly into the vacuum chamber of a scanning electron microscope (SEM) or focused ion beam (FIB) platform (Fig. 1). This enables site-specific analysis under constant vacuum conditions, ensuring that topographical and electrical measurements can be carried out on the same regions of interest (ROI) without delay or repositioning. Using the AFM module LiteScope, which is integrated into the FIB/SEM, it is possible to reveal the structures beneath the sample surface and measure various properties at the same exact location while preserving the same in-situ conditions and preventing sample environmental changes such as contamination or differential pressure. Sample preparation is a cornerstone for the in-situ electrical failure analysis of semiconductors. This work is particularly focused on the combination of plasma FIB (PFIB) delayering with subsequent in-situ conductive AFM (C-AFM) analysis. Automated navigation workflows streamline probe positioning to the exact region of interest (ROI), reducing imaging artifacts and user dependency. This dual-beam configuration allows for real-time switch between milling and probing modes, thus eliminating contamination risk and enabling reproducible current and I/V spectroscopy measurements across device lay- ers in the depth. AFM-IN-SEM ANALYSIS WORKFLOW ON 3D NAND Figure 2 demonstrates an AFM-in-SEM analysis workflow on 3D NAND memory cells, where sub-50 nm features were probed without compromising the surface integrity. First, a larger area of the 3D NAND sample was sputtered with 22 nm of tungsten layer using a gas injection system (GIS) and then delayered using the PFIB, while the AFM tip was safely hidden to avoid material redeposition. The AFM tip was then readily moved to the ROI using a SEM overview with a 30° tilt. Because the AFM tip is clearly visible, the exact location of the ROI cannot be missed. Afterward, both SEM and C-AFM images were taken at the first layer. The whole process was repeated several times, opening the structure in depth, and each time acquiring SEM and C-AFM properties. This allows for the Fig. 1 Example of AFM-in-SEM integration.
edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 12 acquisition of current information utilizing C-AFM of the same device in depth, without the need to transfer the sample back and forth between the AFM and SEM instruments, thereby saving valuable time. Such a method is useful for increasingly complicated structures, particularly for knowing the specific area of electrical failure in devices such as SRAM, logic, vias, interconnects, and non-visual test failures. More recent advances have increased the analytical power of the AFM-in-SEM technology. Self-sensing conductive probes that are extremely sharp and robust have been designed to detect smaller electrical structures such as SRAM devices.[1] Also, Umberto Celano recently introduced a method of electron beam-induced current mapping on 2D materials using AFM (e-beam excited C-AFM), which has a significant potential for usage in advanced semiconductor FA in the future.[2] ACKNOWLEDGMENTS The authors would like to thank Libor Strakos from Thermo Fisher Scientific, Brno for their assistance with FIB delayering surface preparation, and Umberto Celano from Arizona State University for his support and valuable insights into the semiconductor FA. REFERENCES 1. S. Potocky, et al.: “Coating of Self-Sensing Atomic Force Microscopy Cantilevers with Boron-Doped Nanocrystalline Diamond at Low Temperatures,” Phys. Status Solidi A., 222(5), p. 2400553, doi.org/ 10.1002/pssa.202400553. 2. M.A.R. Laskar, et al.: “Electron-Beam Excited Conductive Atomic Force Microscopy for Back Contact Free, Wafer-Scale and In-Line Compatible Electrical Characterization of 2D Materials,” Advanced Science, 12(44), p. e05113, doi.org/10.1002/advs.202505113. Fig. 2 Workflow of subsequent delayering followed by C-AFM mapping on a 3D NAND structure. ABOUT THE AUTHORS Radek Dao is an application engineer at NenoVision, where he focuses on demonstration measurements, installations, and training new users around the globe. He studied physical engineering and nanotechnology at Brno University of Technology and from the beginning focused on SPM. After gathering valuable experience with UHV cryo STM in Roland Wiesendanger’s group at Universität Hamburg, he returned to NenoVision to continue working with AFM-in-SEM systems. He is a co-author of more than 10 articles about nanoscale imaging, and one of his favorite creative outlets is making eye-catching micrographs and videos of microscope image contests. Ondřej Novotný is a development engineer at NenoVision, where he serves as a system architect for the LiteScope AFM-in-SEM platform and drives the development of new measurement modes. He leads global collaborations on self-sensing probe development and supports system feature design, validation, troubleshooting, customer training, and system installations worldwide. He studied physical engineering and nanotechnology at Brno University of Technology and completed research training at Institut Néel (CNRS/CEA) and the SOLEIL synchrotron through ERASMUS+. He contributes to multi-partner R&D projects focused on in-situ microscopy for advanced materials, energy storage, and semiconductor devices.
edfas.org 13 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 Veronika Hegrová is the head of applications at NenoVision company, with extensive experience with AFM-in-SEM. She studied physical engineering and nanotechnology at BUT (Czech Republic) and JKU Linz (Austria), where she continued her work on fabrication and characterization of lowdimensional heterostructures. She is interested in high-tech products, their functionalities, and innovations that help to improve sample characterization. Hegrová has co-authored more than 10 scientific papers and is especially interested in correlative material characterization, which speeds up sample characterization and allows users to better understand complex sample features. Rosalinda Ring is the director of applications and engineering at NenoVision. She has over 25 years of semiconductor experience, working for AMD, Intel, GlobalFoundries, Motorola, and others. Ring is an associate editor of EDFA magazine, a member of the International FA Technology Roadmap Council, and serves on the EDFAS Board of Directors. She holds 47 patents on various FA-related subjects including Ga probe, FIB/SEM GIS, circuit edit, and an EBIC endpointing mechanism. Jan Neuman is the CEO and cofounder of NenoVision, a deep-tech company started in 2015 as a spin-off of CEITEC in Brno, Czech Republic. He earned his Ph.D. in physical and materials engineering from Brno University of Technology, specializing in the fabrication and characterization of nanostructures. During his doctoral research, he contributed to the development of an AFM model for UHV SEM and spent five months as a visiting Ph.D. student at the Weizmann Institute of Science in Israel. His long-standing interest in correlative microscopy led to the commercialization of AFM-in-SEM technology at NenoVision. In recent years, Neuman has focused on applying AFM-in-SEM to current and future challenges in semiconductor failure analysis and regularly presents related results and tutorials at the ISTFA conference.
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edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 16 ENHANCING SOFT DEFECT LOCALIZATION WITH SOFTWARE AUTOMATED INTELLIGENT LASER SCANNING (SAILS) AND ARRAY-BASED IMAGE RECONSTRUCTION Arun Karunanithi1, Benny Hsu1, Kent Erington1, Joseph Caroselli1, Winston Gao1, Calder Wilson1, and Aaron Liao2 1Advanced Micro Devices Inc., Austin, Texas 2University of Texas at Austin, Austin, Texas arun.karunanithi@amd.com EDFAAO (2026) 1:16-21 1537-0755/$19.00 ©ASM International® INTRODUCTION Soft defect localization (SDL) is a fault isolation (FI) technique used to root cause device marginalities and/ or defects. The variety of test modes and their marginalities that can be solved with SDL is increasing as new ways are found to utilize this technique. However, SDL analysis can be time consuming if the test times are slow, because millions of test executions are needed to get a statistically significant result. To solve this problem, the authors propose an improvement named software automated intelligent laser scanning (SAILS) to modulate laser dwell time on the fly. This software and hardware implementation can be applied to any test method, now or in the future, and to any of the SDL tools available in the market. The approach utilizes an array-based image reconstruction methodology alongside an automated SDL workflow for improved site detection accuracy of both weak and strong sites. This paper describes the successful implementation of this approach and shows its ability to judiciously mask out sites in real-time and use the mask to modulate laser dwell time. Soft defect localization involves setting the device under test (DUT) at a marginal pass/fail state while looping on the test indefinitely.[1] A near infrared laser beam is used to perturb sensitive circuitry and alter the DUT’s pass/fail behavior. The pass/fail result is mapped on to the raster area and is overlaid on a laser scanning microscopy (LSM) image as shown in Fig. 1. Since the technique involves looping the marginal test indefinitely, loop time for the test becomes critical for SDL data collection. TEST LOOP TIME CHALLENGE FOR SDL SDL application for typical root cause analysis for SCAN test mode is relatively simple in terms of test loop length because only a subset of pattern vectors can be run. This ensures the test loop length is on the order of microseconds. Industry studies have reported that a reasonable test loop should be about 1 millisecond; 100 milliseconds is almost impossible.[2] However, successful SDL analysis with loop times over 100 milliseconds by creating asymmetric loops has been reported.[3] When asymmetric loops are not possible, a different solution using long loop times is needed. Solutions exist in the industry to solve this including DXGlue.[4] In this paper, the authors propose one such solution based on real time laser dwell time modulation using variable synchronization pulses. This enhancement will be referred to as SAILS. Fig. 1 A typical raw SDL image on the left showing regions of white and black pixels where laser caused the test to fail and pass, respectively. Overlay SDL on LSM is shown on the right.
edfas.org 17 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 1 LASER SCAN ALGORITHM A standard SDL laser scanning algorithm employs a fixed laser dwell time either set by the user or using a synchronization signal driven by an external source like the tester. SAILS uses a variable synchronization pulse signal driven by a microcontroller. An inexpensive microcontroller-based data acquisition system is employed to establish signal communication between the tool and a host computer running a LabVIEW application. Figure 2 shows how these three systems communicate with each other. The reason for using an external microcontroller with custom LabVIEW script is to make SAILS tool agnostic. SAILS can easily be adapted to any laser scanning tool as long as it supports synchronization capability. Under normal operation, the laser will move its position after each test loop iteration on the DUT. The raster path begins at the top left of the frame, and ends at the bottom right, moving in a typical raster fashion. In this implementation, specific regions in the frame are traversed at different laser trigger frequencies than others based on real time image processing. The steps in the SAILS technique are executed in a non-linear sequence, so a state machine architecture shown in Fig. 3 was chosen. After the scan parameters are set, the user can start the program, which runs autonomously until the scan is complete. The state machine begins in an idle state where the user can input scan parameters such as the slow and fast dwell times, site detection criteria, and the total number of frames to scan. After these are set, the user can initiate the scan sequence. To obtain a rough scan for site detection, the scan will proceed with normal operation for a user defined number of frames to acquire an initial image. Once these frames are collected, the state machine will pass this rough scan data to the site detection state in real time, where a thresholding/image processing algorithm is executed and a scan mask is generated. For the remaining frames, SAILS modulates the dwell time of the laser across the frame according to the scan mask. TOOL SCAN RECONSTRUCTION For SAILS to identify sites correctly, laser scanning data must be replicated correctly external to the laser tool. Each time a quantity of trigger pulses is sent, the tool reads the same number of pass/fail states. To ensure that the site detection algorithm makes a conservative estimate of the sites, a Gaussian blur (σ = 1.5) is applied to the rough scan, which helps by radially diffusing intensity of each individual peak. With this approach, Fig. 4 shows that SAILS can reproduce images that preserve the location and size of the sites. The next step after replication of the image is to detect sites in real time. SITE DETECTION ALGORITHM TRADITIONAL SITE DETECTION The site detection algorithm aims to reduce scan time of an image by identifying potential sites early in the imaging process. It does so by using averaged rough scan data gathered from a user defined number of initial frames. Fig. 2 Diagram showing system configuration of SAILS. Fig. 3 State machine diagram for the LabVIEW program.
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