edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 27 NO. 4 10 Some improvements that can mitigate this trade-off will be required to extend the LI-OBIRCH technique to thicker (~10 µm or more) devices. The second challenge is the data processing algorithm. To get reasonable processing results, parameters need to be tuned and the FA engineers have to iterate an analysis several times. Besides, approximated temperature field and uniform medium approximation can cause additional errors. Further algorithm and GUI improvement will be required. At the same time, exploring applicable cases using real customer field samples is also quite important to understand better the benefits and drawbacks of the technique and algorithm. SUMMARY OFI techniques for FA applications relying on heat diffusion were discussed for 3D devices. Using relatively thin 3D devices as proof-of-concept test samples, the TR and LI-OBIRCH techniques were discussed, with a brief reference to heat diffusion theory. In the section for TR, the working principle of the technique and simple testing capability of TD Imaging were discussed. TR Coeff is different depending on the sample structure. TD Imaging has been enhanced to allow selection of any wavelength for probing. It is also important to reduce the noise of the light source (RIN). In the LI-OBIRCH section, the working principle of the technique and a simple mathematical model for 3D analysis were discussed, along with experimental results from proof-of-concept tests, which confirmed the promise of the team’s 3D data processing algorithm. Physics-related challenges and algorithm challenges were also discussed. TR and LI-OBIRCH can be promising OFI candidates for 3D devices such as BS-PDN and 3D NAND flash memories. Hamamatsu will continue advancing failure analysis for 3D and next-generation devices, contributing to the development of future FA techniques. ACKNOWLEDGMENTS The authors would like to acknowledge Dr. Tomonori Nakamura, Mitsunori Nishizawa, Yuji Nakajima, Mitsuyoshi Yoneda, Xiangguang Mao, Yuhei Aoshima, Shinsuke Suzuki, Yukako Tabuchi, Masataka Ikesu from Hamamatsu Photonics K.K., for designing low noise light sources, low noise scanner, designing system, and software. REFERENCES 1. “More Moore,” IEEE International Roadmap for Devices and Systems (IRDS) 2023 Update, IEEE, 2023. 2. “High Bandwidth Memory (HBM3) DRAM,” JEDEC, Apr. 2025. 3. “Mass Data Storage,” IEEE International Roadmap for Devices and Systems (IRDS) 2023 Update, IEEE, 2023. 4. Y. Wang, et al.: “3D NAND Oxide/Nitride Tier Stack Thickness Measurements with Infrared Metrology,” 2023 34th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2023, p. 1-8. 5. P. Kalavade: “4 bits/cell 96 Layer Floating Gate 3D NAND with CMOS under Array Technology and SSDs,” 2020 IEEE International Memory Workshop (IMW), Dresden, Germany, 2020, p. 1-4. 6. M.J. Kobrinsky, et al.: “Process Innovations for Future Technology Nodes with Back-Side Power Delivery and 3D Device Stacking,” IEDM2023. 7. W. Lo: “X-Ray Device Alteration using a Scanning X-Ray Microscope,” Proceedings of the ISTFA2022, 2022, p. 153-162. 8. T. Matsumoto: “Ultrasonic Beam Induced Resistance Change,” EDFA, 20(3), 2018, p. 18-22. 9. J.J. Huening, et al.: “E-beam Probing and E-beam-Assisted Device Alteration (EADA) for Fault Isolation in PowerVia and Advanced Technology Nodes,” Proceedings of the ISTFA2024, 2024, p. 519-522. 10. C. Zhang, et al.: “High-Precision Pulse Reflectometry-Based Fault Localization Approach for Advanced Chip Package Failures,” Proceedings of the ISTFA2023, 2023, p. 285-290. 11. C. Schmidt, et al.: “Application of Lock-in Thermography for Failure Analysis in Integrated Circuits using Quantitative Phase Shift Analysis,” Mat. Sci. and Eng. B, 177, 2012, p. 1261. 12. K. Nikawa, et al.: “Novel Method for Defect Detection in Al Stripes by Means of Laser Beam Heating and Detection of Change in Electrical Resistance,” Jpn. J. Appl. Phys., 34, 1995, p. 2260. 13. D.K. Shroder: “Semiconductor Material and Device Characterization,” 3rd edition, IEEE Press, Wiley-Interscience, p. 721-722. 14. O. Breitenstein et al.: “Lock-in Thermography Basics and Use for Evaluating Electronic Devices and Materials,” Springer, 2nd Edition, 2010. 15. C. Schmidt, et al.: “Application of Lock-in Thermography for Failure Analysis in Integrated Circuits using Quantitative Phase Shift Analysis,” Mat. Sci. and Eng. B, 177, 2012, p. 1261. 16. K.J.P. Jacobs, et al.: “Lock-in Thermal Laser Stimulation for Nondestructive Failure Localization in 3-D Devices,” Microelectronics Reliability, 76-77, 2017, p. 188. 17. N. Chinone, et al.: “Concept-Proof of Lock-in OBIRCH Application Fig. 8 Laser reflection image and processed results. (a) Laser reflection image. (b) and (c) Data processing results which correspond to “bottom” and “top,” respectively. (b) (c) (a)
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