edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 27 NO. 2 42 GUEST COLUMN MEETING THE METROLOGY NEEDS OF THE ELECTRONIC DEVICE FAILURE ANALYSIS TECHNOLOGY ROADMAP Paul Hale CHIPS Metrology Program, National Institute of Standards and Technology paul.hale@chips.gov The bipartisan CHIPS and Science Act of 2022 (CHIPS Act) provided the Department of Commerce with $50 billion for programs to strengthen and revitalize the U.S. position in semiconductor research, development, and manufacturing—while also investing in American workers. In 2023, the CHIPS Metrology Program was stood up to support the CHIPS Act’s provision for NIST to establish a metrology program that will strengthen the U.S. semiconductor industry through multidisciplinary research and development efforts. Metrology is needed to benchmark, control, and improve manufacturing processes, and plays a crucial role in semiconductor manufacturing. As devices become more complex, smaller, and multi-layered, the ability to measure and ensure manufacturing quality becomes much more challenging. Today, the domestic semiconductor industry faces some of these challenges with workarounds and inadequate tools, limiting yields, impacting quality, and increasing costs. As greater demands are put on semiconductor device performance and material requirements, these challenges will continue to intensify. The CHIPS Metrology Program emphasizes measurements that are accurate, precise, and fit-for-purpose. This work leverages NIST’s measurement science expertise, standards development contributions, and stakeholder engagement practices to address the highest priority metrology challenges identified across the industry. Advances in measurement are foundational to the failure analysis community. In 2022, NIST conducted a landscape analysis including industry workshops that culminated in a published report entitled Strategic Opportunities for U.S. Semiconductor Manufacturing.[1] This report identified seven grand challenges that need critical attention from a metrology perspective to achieve the future state vision of a U.S.-led global semiconductor industry. The CHIPS Metrology Program aligns its research and development portfolio based on the metrology needs identified in the seven Grand Challenges and with industry roadmaps, such as the Electronic Device Failure Analysis (EDFA) Technology Roadmap.[2] The CHIPS Metrology Program has four initiatives aligned to support the EDFAS community: its R&D portfolio, the CHIPS Metrology Small Business Innovation Research (SBIR) program, the CHIPS Metrology Community, and the Metrology to Innovate in Semiconductors (METIS) data exchange. These initiatives help translate laboratory research to the factory floor. The R&D portfolio includes projects that address the technical challenges highlighted in Balachandra et al. and the Roadmap where commercial solutions do not exist.[1,2] These projects include 3D x-ray imaging as well as time-resolved emission microscopy for circuit evaluation and failure analysis with improved sensitivity and resolution.[3] The CHIPS Metrology SBIR is supporting 17 small businesses to commercialize critically needed measurement services, tools, and instrumentation; innovative manufacturing metrologies; novel assurance and provenance technologies; and advanced metrology R&D testbeds to help secure U.S. leadership in the global semiconductor industry. The CHIPS Metrology Community at nist.gov/chips/metrology-community, is facilitating data and knowledge sharing across initiatives within the CHIPS Metrology program’s seven Grand Challenges and helping stakeholders inform industry standards that are critical for enhancing U.S. economic and national security. Participation in the Community is open and available to members across the semiconductor industry, academia, consortia, and all stages of career levels, from engineers to executives. METIS is a data exchange ecosystem to access CHIPS Metrology research results and to serve as a catalyst for semiconductor manufacturers and can be accessed at Hale
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