Nov 2024_EDFA_Digital

edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 26 NO. 4 16 To validate the scans that applied a deep-learning algorithm, an additional 20.5-hour scan was run to serve as ground truth. It was also used to train an AI model that was applied on five- and two-hour scans. Representative images of a virtual slice revealing TSV misalignment and a 3D XRM image showing the density and volume of structures analyzed are shown in Fig. 2. Several representative interconnects were used as a benchmark to determine the threshold for analytics on bump width, height, and via alignment, and the algorithm was subsequently applied across the entire dataset from the FOV of the sample. A final comparison of the analytical data set was plotted across all scans to determine whether the deep learning-assisted model provided accurate information for via alignment and bump dimensions across all 15 layers in the stack. Figure 3 shows data for mean TSV misalignment (left) and standard deviation (right). The 15-minute scans were validated by their good agreement to 20-hour scans with a standard deviation of less than a half micron. This analysis of the entire chain from dies 1 to 15 showcases a novel 2D/3D x-ray microscopy alignment and inspection solution for TCB in a flip chip FOWLP with a workflow that allows for both quantitative evaluation of TSV and bump alignment in the x, y-plane as well as bump dimensions in the z-plane. By using 3D XRM along with AI models, it is possible to conduct analysis of highly integrated packaging structures with reasonable throughput for process development, validation, and error correction guidance. In addition, the scan times achieved by application of deep learning for reconstruction are practical for FA quality checks of failed products. Figure 4 shows a buried defect that was identified within the 3D XRM volume. Because the process in the use case was exclusively optimized for local interconnect alignment as the top die stack terminates at the final die level, global alignment was not a requirement. For future applications where the top die interconnect is required or global shift is of concern, an additional alignment step on a fixed reference point to the bottom substrate can be done quite easily to compensate. There is still opportunity to improve throughput by implementing emerging deep learning and data reconstruction solutions and validating scans on the larger FOV, which could potentially enable a full scan of complete arrays in 3D at throughput acceptable for an inline 3D x-ray platform. X-RAY-GUIDED LASER CUTS FOR PACKAGE-LEVEL FAULT ISOLATION In another application,[7] 3D XRM is used to guide and verify the precise and targeted sample preparation of a multi-die package using a fs-laser integrated FIB-SEM to enable functional testing and fault isolation while imparting minimal damage to the package and IC. The electrical connections going to the different components in 3D packages may have complex circuitry that could lead to challenging fault isolation routines to identify the failure sites. Isolating some of the components in these packages to determine failure sites with higher accuracy requires deactivating certain features or parts of the circuit. A baseband modem IC from the motherboard of a mobile phone, assembled as a 3D package consisting of one flip-chip die (baseband processor) connected to the substrate through solder bumps and another die (memory and/or analog) with wire bonds, illustrates this complexity, making it the ideal candidate for testing. With the right tools and workflows, it is possible to selectively break an interconnect or wire while maintaining sufficient integrity of the chip/package for functional testing. The targeted structures for physical alteration must be accessible either through the molding compound or other protective packaging materials. In the combined high-resolution nondestructive 3D XRM and LaserFIB workflow, a Fig. 4 A defect was detected in the 3D XRM scan. A 10 µm buried underfill void looks isolated in a virtual cross section slice (upper right) and is revealed to be more extensive by the plan-view slice (bottom left).

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