edfas.org 25 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 26 NO. 2 PCB, a slow ramp rate of 10°C/min is imposed in the thermal chamber during temperature transitions. This temperature amplitude is tested and the dwell time at high and low temperatures is set to 10 minutes. Viscoplastic phenomena are believed to occur when TH = T/Tm > 0.4 (TH is the homologous temperature defined as the ratio between the temperature and the melting temperature of the material Tm). [6,10] Between -40°C and 125°C (extreme temperatures for the considered thermal cycling conditions), SAC305 homologous temperatures are respectively close 0.5 and 0.8.[10] TH = T/Tm = 125/221 = 0.56 > 0.4 (Eq 18) APPLIED LOADS The power and temperature cyclic stressing of electronic devices are widely regarded as a critical reliability concern for electronics. This reliability is linked to the initiation and propagation of defects, which lead to the failure of the systems if they are not inspected. As a consequence, an electro-thermomechanical numerical study is carried out in an attempt to overcome this failure type. The total generated thermal stress may hence be split into two principal types: passive thermal cycling (PTC) and active power cycling (APC). A cyclic current is applied with a maximum value of 0.3 mA and 0 as a minimum value. During operation, the silicon chip generates heat and becomes the heat source. The temperature profile defined in Fig. 4 also enters into the mechanical model due to the thermal expansion of the semiconductor lattice. This is modeled by introducing a thermally induced additional strain = −αij (T − T0), where the αij are the thermal expansion coefficients and T0 a reference temperature. The reference temperature for the thermal stress has been taken as 300 K.[9] RESULTS AND DISCUSSIONS Due to the inputs detailed in the previous paragraph, electrical, thermal, and mechanical outputs are generated and analyzed. Figure 3 shows the total current density curve, which is proportional to the increase of applied current. This density is accumulated over each step until it reaches a threshold limit at 5523 A/m2. This is due to the electrical inertia of the assembly. Fig. 2 BGA geometry. Table 1 Material properties FR4 Copper Silicon SAC305 λ 0.3 400 130 58 α 18 x 10-6 17 x 10-6 2.6 x 10-6 23.5 x 10-6 Cp 1369 385 700 232 E 22 110 170 51 ϱ 1900 8960 2330 7380 ν 0.28 0.35 0.28 0.4 ρ 8 x 1011 1.7 x 10-8 4 x 103 1.23 x 10-7 Melting point, C° 135 1085 1410 221 Table 2 Parameters of the Anand model[11] Material parameters A, s-1 Q/R, K ξ m S, MPa η h0 a S0 SAC305 5.78 x 104 7460 2 0.0942 58.3 0.015 9350 1.5 45.9 (continued on page 28)
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