edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 25 NO. 4 12 LASER-BASED COPPER DEPOSITION FOR SEMICONDUCTOR DEBUG APPLICATIONS Michael DiBattista1, Scott Silverman1, and Matthew M. Mulholland2 1Varioscale Inc., San Marcos, California 2Intel Corp., Santa Clara, California miked@varioscale.com EDFAAO (2023) 4:12-16 1537-0755/$19.00 ©ASM International® INTRODUCTION The rapid development of advanced integrated circuits (IC) with increased performance and expanded features now requires more than shrinking the transistor geometry during fabrication. Designs for 2.5D[1] and 3D[2,3] packaging, highly integrated chiplets,[4,5] backside power delivery,[6] and other technologies have emerged. Figure 1 shows an example of new products with complexity that extends beyond monolithic IC fabrication and package assembly. Debug technologies that enable the rapid diagnosis and modification of high-performance circuits in package play a key role to the product introduction success. Focused ion beam (FIB) systems have traditionally had a large role in the study and prototyping of integrated circuits during the debug stage.[8] Circuit edit FIB tools can edit the design in silicon by establishing new signal paths with ion beam-based deposition and cut signal traces by employing well established techniques.[9] Measuring electrical characteristics such as current, voltage, and timing by direct access pico probing can play a critical role in design debug.[10,11] Accessing the targeted signals with a FIB access point is a key capability of these instruments, but depositing material for multiple probe pads with FIB can be time consuming due to deposition rates and cleanup activities. The continuous precursor exposure over long time periods can result in the degradation of key components of the tool, and there are also significant material property limitations of the FIB deposited tungsten (W) or platinum (Pt).[12] The carbon contamination from the selected metal organic precursors results in a significant increase in electrical resistance. This often results in material with a resistance 10 to 100 times greater than the bulk conductivity value of 5.6 µohm-cm for W and 10.6 µohm-cm for Pt. BACKGROUND Copper is an attractive candidate for rerouting signals on integrated circuits and packages due to its low electrical resistivity (1.67 µohm-cm), high thermal conductivity, and compatibility with the existing copper backend interconnect and package routing layers. With the development and introduction of copper(hfac)tetramethylvinylsilane, (Cu(hfac)TMVS), commercially available as CupraSelect, copper deposition with consistently low resistivity can be achieved at temperatures approaching 120°C.[13] Using a pyrolytic laser chemical deposition (LCVD) process, the laser energy acts as a localized heat source when focused on the sample and drives the chemical reaction of the adsorbed precursor.[14] The precursor reaction is composed of a copper (II) hexafluoroacetylacetonate (CuHfac) molecule bonded to a tetramethylvinylsilane (TMVS). This structure provides the copper component with an improved vapor pressure over earlier copper precursors such as: copper (II) acetylacetonate (Cu(acac)2), copper hexafluoracetylacetonate (Cu(hfac)2), or 1,5 cyclooctadience copper (I) hexafluoraceylacetonate (COD-Cu-hfac).[15-17] Fig. 1 2.5D vs. 3D IC designs.[7]
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