edfas.org ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 24 NO . 4 38 At this point in the process, the die has changed its curvature and the grind and coarse lap processes have usually removed more material from the highest portion of the die. Measuring the surface profile needs to be done and thickness must also be measured. The mechanical profile establishes the surface to be corrected by the thickness measurements. The combination of thickness andmechanical profiles allows a tool path that will result in little RST variation. In thebeginningprocess steps, there aremanypossible errors. The thickness measurements are less reliable and the possibility ofmechanical measurement errors ismuch higher. Surface contamination is problematic, requiring that the die surface be carefully cleaned for both thickness and mechanical profile measurements. If the thicknessmeasurements aremadewith an accuracy of 1%, mechanical surface measurements are made to 1.0 microns and tool path accuracy is 0.5 microns, one can expect the result RST, at 50 microns, to be consistent to +/-2.5 microns. This assumes that thickness measurements are taken inward of the edge thickness variations. It is obvious that thicknessmeasurements taken too close to the edges will not result in good thickness control. CONCLUSIONS With careful processing, cleaning, RSTmeasurements, and a sample processing machine that moves the grinding, lapping, and polishing tools to a thickness corrected surface profile, samples can be reliably processed to a 50 micron thickness with an RST variation of +/- 2.5 microns across the majority of the die. There are variations in RST near the edges of the die that are created by the lapping and polishing tools not moving off the die surface and distortions relating to the slope of the surface near the die edge. All thicknessmeasurements need to be made inside of the die edge distortions. Within these limits, +/- 2.5micron, or better, RST variation is achievable without operator intervention. All the operator needs to do is clean everything, measure the RST at 9 points on the die surface, install tools, and apply the correct slurries. Adjustment of nominal material removal in each stepmay be required to get the final desired thickness, but no operator involvement should be required during processing. Push the run button and go to lunch. A good operator can get frommounting through final polish in 5 to 6 hours for an 18-mm square flip chip with a final thickness of 50 +/- 2.5microns over all but die edges, and do a lot more stuff while the polishing machine is running. The resulting sample is robust enough to go into a test socket and power up. It is thin enough for evaluation and identification of areas of interest that can be thinned to less than 10 microns for detailed analysis. Local thinning to less than 10 microns can be done quickly and does not compromise the robust nature of the sample. This twostep process gets samples completed in hours instead of days required for whole sample thinning to less than 10 microns. REFERENCES 1. K. Martin: “A Process for Thinning and Polishing Highly Warped Die to High Surface Quality and Consistent Thickness: Part I,” Electronic DeviceFailureAnalysis, 17(3), 2015, p. 20-28, https://doi.org/10.31399/ asm.edfa.2015-3.p020. 2. K. Martin, et al.: “Thinning and Polishing HighlyWarpedDie: Part II; A Discussion of the Mechanical Limitations of Flattening a Curved Die in Preparation for Die Thinning,” Electronic Device Failure Analysis, 17(4), 2015, p. 4-12, https://doi.org/10.31399/asm.edfa.2015-4.p004. 3. S. Timoshenko: “Analysis of Bi-metal Thermostats,” J. Opt. Soc. Am., 11(3), 1925, p. 233. ABOUT THE AUTHOR KirkMartin has almost 50 years of experience in designing andbuilding specialized equipment for all aspects of the semiconductor industry, fromcrystal growth through final test and failure analysis. In 2017, he became a founder of RKDSystems, whichdesigns andbuilds equipment for semiconductor failure analysis sample preparation. Martin has patents in the fields of sample preparation, chemical vapor generation, fluid handling, and electrostatic discharge detection and mitigation. His previous positions include vice president at Nisene Technology Group, director of Advanced Products at Texas Materials Labs, amanufacturer of specialty semiconductormaterials, and vice president at Automated Technology Inc., a manufacturer of front-end test and measurement systems.
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