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edfas.org ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 24 NO . 2 32 Developing a new tool to detect both material and structure is very important not only for interposer inspec- tionbut also for hardware assurance. THz has thepotential capability; however, it has its limitation such as low signal to noise ratio and takes an extremely long detection time. Other than this, effective collaboration between differ- ent detection technologies is also possible to solve this problem. Speed is essential for in-process fabrication assuranceverification. Developingnewdetectionmethods candecrease thedetection time. However, amoreeffective way is to find the “fingerprint” of each assurance problem. Ideally, several representative signals, the fingerprint, can be used to define the reliability and integrity of the interposer after fabrication. CONCLUSION This article first introduces the development trend of the IC packaging and, to bemore specific, the packaging’s interconnection technology development. It turns out that the flip-chip technology will be applied in the majority of advanced packaging tomeet the high bandwidth require- ments. Then a comprehensive study of optical attacks is presented, including different types of optical attacks and the steps to place these attacks. It appears that optical attack is a dire threat to the existing security assets, and this threat will get even worse for advanced packaging with flip-chip interconnections. Different kinds of threat models have been developed based on the adversary’s capability and security assets availability. These classified thread models can be used for the security assessment of the advanced IC packaging and can help evaluate the efficiency of the new countermeasure approaches. Finally, state-of-the-art countermeasures are shown, and with the help of the newly developed threat models, the limitation of these schemes has been presented. Though 100% elimination of the effect of optical attack remains unachievable, understanding the attack approach and potential adversaries helps to know its perniciousness and urges the community todevelopnewsecurity schemes for protecting the chip backside from unauthorized access. REFERENCES 1. K. Zoschke, et al.: “TSV Based Silicon Interposer Technology for Wafer-level Fabrication of 3D SiP modules,” IEEE Electronic Components and Technology Conference, p. 836-843, 2011. 2. V.S. Rao, et al.: “TSV Interposer Fabrication for 3D IC Packaging,” Electronics Packaging Technology Conference, p. 431-437, 2009. 3. A. Usman, et al.: “Interposer Technologies for High-performance Applications,” IEEE Transactions on Components, Packaging and Manufacturing Technology, 7(6), p. 819-828, 2017. 4. M. A. Bolanos: “Semiconductor Integrated Circuit Packaging Tech- nology Challenges - Next Five Years,” International Symposium on Electronics Materials and Packaging, p. 6-9, 2005, doi: 10.1109/ EMAP.2005.1598225. 5. T.G. Lenihan, L. Matthew, and E.J. Vardaman: “Developments in 2.5D: TheRoleofSilicon Interposers,” IEEEElectronicsPackagingTechnology Conference, p. 53-55, 2013 , doi: 10.1109/EPTC.2013.6745683. 6. The Bloomberg Businessweek. 2018. The Big Hack. Technical Report. Retrieved from https://www.bloomberg.com/news/ features/2018-10-04/the-big-hack-how-china-used-a-tiny-chip-to- infiltrate-america-s-top-companies. 7. D. Mehta, et al.: “TheBigHack Explained: DetectionandPreventionof PCB Supply Chain Implants,” ACMJournal on Emerging Technologies in Computing Systems, 16(4), p. 1-25, 2020. 8. M. Rahman, et al.: “Physical Inspection & Attacks: New Frontier in Hardware Security,” IEEE International Verification and Security Workshop, p. 93-102, 2018. 9. C. Xi, N. Jessurun, and N. Asadizanjani: “A Framework to Assess the Security of Advanced Integrated Circuit (IC) Packaging,” IEEE Electronics System-Integration Technology Conference, p. 1-7, 2020. ABOUT THE AUTHORS Aslam A. Khan is currently pursuing his Ph.D. at the University of Florida in the Electrical and Computer Engineering Department. He received an M.S. degree in electrical and electronics engi- neering fromNorfolk State University in 2020. His research is focused on package security assurance and reverse engineering. Chengjie Xi is currently a Ph.D. student at the University of Florida in the Electrical and Computer Engineering Department. He received anM.S. degree in materials science from the University of Florida in 2020. His research is focused on developing counterfeit detection and prevention methods for integrated circuit designs and packaging. Navid Asadizanjani received a Ph.D. degree inmechanical engineering from University of Connecticut in 2014. He is currently an assistant professor with the Electrical and Computer Engineering Department at University of Florida. His current research inter- est is primary on physical attacks and inspection of electronics. Asadizanjani has received and has been nominated for several best paper awards from International SymposiumonHardware Oriented Security and Trust and International Symposium on Flexible Automation. He was also the winner of D.E. Crow Innovation award from University of Connecticut.