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edfas.org 23 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 24 NO . 2 5. R. Mears, et al.: “Punch-through Stop Doping Profile Control via Interstitial Trapping by Oxygen-insertion Silicon Channel,” Proc. IEEE Electron Devices Technology and Manufacturing Conference, 2017, p. 65-66. 6. D.H. Dahanayaka, et al.: “Intra-Device Defect Localization through EBIC/EBACCombinedwithElectrical Nanoprobing for FinFETDevices Composed of Multiple Sub-Elements,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2016. 7. X.-D. Wang, Y. Tsang, and C. Howard: “X-Sectional Scanning Capacitance Microscopy (SCM) Applications on Deep Submicron Devices at Specific Sites,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2010, p. 98-101. 8. K. Jarausch, et al.: “Site Specific 2-D Implant Profiling using FIB Assisted SCM,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2002, p. 467. 9. S. Subramanian, K. Ly, and T. Chrastecky: “Cross-Section Sample Preparation Method for Imaging Dopant Related Anomalies using Scanning Probe Microscopy Techniques,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2014, p. 519-524. 10. N. Adhikari, et al.: “ANovel Sample Preparation Approach for Dopant Profiling of 14 nm FinFET Devices with Scanning Capacitance Microscopy,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2020. 11. P. Kaszuba: “A Technique for Achieving Ultra-smooth Chip Cross Sections,” Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 1995. 12. P. Kaszuba, D. Douglass, andZ. Shafrir, Z: “AutomatedCross-sectional Sample Preparation for Scanning Capacitance Microscopy,” Elec- tronic Device Failure Analysis, 2005, p. 6-8. 13. V.V. Zavyalov, J.S. McMurray, C.C. Williams: “Surface and Tip Char- acterization for Quantitative Two-dimensional Dopant Profiling by ScanningCapacitanceMicroscopy,” AIPConference Proceedings 449, 1998, p. 753. 14. L. Doezema, et al.: U.S. Patents 6,139,759 and 6,198,300 B1. ABOUT THE AUTHORS Nirmal Adhikari received his Ph.D. in electrical engineering from South Dakota State University in 2016. He works as a principal engineer at GlobalFoundries. He has extensive experience in dopant analysis of microelectronic devices using scanning probemicroscopy-based techniques. His research area includes novel sample preparation approach for advanced node FinFET devices, nanoscale study of semiconductor devices for efficient charge transport, solar cells, and 2D materials. He has authored or co-authored 59 technical papers. Phil Kaszuba, FASM, is a retired senior member of the technical staff for GlobalFoundries. He holds a B.S.E.E. fromtheUniversity of Vermont andworked in the semiconductor industry for over 40 years. He led the IBM/GF SPM Lab for 27 years and now leads his own consulting firm, Consultants in Nanotechnology Analysis LLC. Kaszuba holds nine U.S. patents and several international patents in the field of scanning probe microscopy. He serves as a nanotechnology review panel member for the National Science Foundation and a consultant to the Defense Advanced Research Projects Agency. He has authored numerous articles and papers, includ- ing the SPM chapter in the Microelectronics Failure Analysis Desk Reference, 7th Edition. Kaszuba is a regular participant at ISTFA and won the Best Paper Award for ISTFA 2019. GaitanMathieu is amember of the failure analysis teamat GlobalFoundries (GF). He has enjoyed a long and outstanding career in the semiconductor industry, starting in equipment maintenance and then advancing to the site staff telecommunications engineer, to many other responsibilities in IBMmicroelectronics and later in GlobalFoundies. He joined the GF Failure Analysis team in 2010. He has been instrumental in process development to de-layer microelectronics chips down to the very lowest levels, specializing in planarity. In addition, he specializes in cross-section sample preparation of advanced node FinFET structures for SPM analysis. Most recently he was successful in providing clear dopant profiles on a site specific 14 LPP SRAMgate array by cross-sectioningmultiple iterations of the same defect and co-authored a paper titled “A Novel Sample Preparation Approach for Dopant Profiling of 14 nm FinFET Devices with Scanning Capacitance Microcopy” at the ISTFA conference. Daminda Dahanayaka is the manager of the material and chemical failure analysis lab teams in GlobalFoundries. He has over 20 years of experience in various technical and management roles both in academia and industry. In his previous roles, he has managed the failure analysis advanced techniques lab teams and the semiconductor package failure analysis teams at the same location. Dahanayaka receivedhis Ph.D. inphysics fromtheUniversityof OklahomaandMBA fromtheUniversity of Massachusetts Amherst. He is the author or co-author of over 15 peer reviewed journal publications, over 50 conference presentations, and two patents. Part of his thesis work involved development of scanning surface photovoltage microscopy (SSPVM) technique to measure mechanical stress in CMOS devices with sub-micron resolution. He has been actively involved with ISTFA for 12 years.