February_EDFA_Digital
edfas.org ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 24 NO . 1 6 layers were processed on a silicon wafer (see Fig. 5). The test samples differ either in the thickness of the aluminum- copper (Al-Cu), the upper siliconoxide (SiO x ), or the copper (Cu) layer (see Table 1). In order to assess the crack prob- ability for semiconductor devices, the design andmaterial of the test structures are similar to typical back-end-of-line (BEOL) layer stacks of CMOS technology chips. EXPERIMENTAL SETUP AND DATA PROCESSING In this study, the AE crack experimentswere performed using an indenter with a flat-ended circular diamond tip of 5 or 10 µm in diameter (abbreviated FP05 and FP10, res- pectively), which is pressed vertically on top of the surface of the test structure, analog to a realistic probing process. Figure 6a shows a typical contact cycle for contacting an Al-Cu top layer. In this experiment, test structure W11 was loaded up to a maximum contact force of 650 mN using the indenter FP10 and subsequently unloaded (blue curve). The associated acoustic-induced voltage signals are shown as green dots, the so-called AE hits. The peak amplitude of each hit is plotted in dB AE (reference value 1 μV). In the given example, the time-dependent force curve is nonlinear up to a contact force of approximately 230mN,while simultaneouslynumerousAEhitsweremea- sured above a threshold voltage U th of 23 dB AE . This effect is caused by the fact that the indenter penetrates with rising contact load into the Al-Cu top layer, which is plastically deformed and the indentation depth is increasing (see Fig. 7a). The number of AE hits and their peak amplitude is decreasing proportional to the increasing penetration depth. Above a contact forceof 230mNonly isolatedhits of lowamplitude occur. The cracking of the SiO x layer during indentation on the Al-Cu top layer starts at a contact force F c of 367 mN with a peak amplitude A peak of 55.9 dB AE . An exemplarywave signal of a crack-induced AE hit is plotted in Fig. 6b, over its whole signal duration time. [1] Table 1 Layer thicknesses of test structures W06, W08, and W11. Test structure W06 W08 W11 Layer thickness, nm Al-Cu 1450 1450 3000 Ti 40 40 40 Ta 50 50 50 SiO x 1000 1000 3000 Si 3 N 4 50 50 50 Cu 700 400 700 SiO x 1900 Si-wafer 500 x 10³ Fig. 5 Schematic layer stack of test structures W06, W08, and W11. [1] Fig. 6 (a) Contact cycle on test structure W11 using indenter FP10, [1] (b) acoustic-induced voltage signal by an oxide crack. (a) (b)
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