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edfas.org 1 7 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 23 NO . 4 ABOUT THE AUTHORS Douglas Hunt received a B.S. degree in physics from Rensselaer Polytechnic Institute, and a M.E. degree in electrical engineering from Rochester Institute of Technology. He has over 30 years of experience in semiconductor chip and packaging failure analysiswithin IBMandGlobalFoundries. His areas of expertise are in yield test structures, DRAM, and SRAM analysis, as well as flip chip and 2.5D package analysis. He is currently a senior member of the technical staff at GlobalFoundries working as a team leader in the reliability failure analysis laboratory. Daniel Bader received his A.S.E.E from Vermont Technical College in 1994 and has been working in the semiconductor industry ever since. Starting in an equipment maintenance role, he progressed through roles in equipment engineering as a manufac- turing data systems software technician, a research laboratory technician at Sematech’s EUV Mask Blank Development Center, and finally as a failure analysis laboratory technician since 2007. Bader is well versed inmost of the alphabet soup of equipment used in FA, including XRT, CSAM, XIVA/TIVA/ OBIRCH, FIB/SEM, AFM, AFP, etc. He is currently focused on EBAC/EBIRCH/EBIC technique develop- ment in nanoprobing. Pascal Limbecker received his diploma in electrical engineering with focus on microsystems technology at the University of Applied Science in Zwickau. He wrote his diploma thesis about the OBIRCH fault isolationmethod in 2004 at AMD Saxony in Dresden. Nowhe ismember of the technical staff in the PFA Lab of GlobalFoundries Dresden. Since 2005 he worked as a specialist for physical failure analysis. His expertise field is defect localization using OBIRCH, lock-in thermography, voltage contrast andEBAC, samplepreparation, SEM/TEM imaging, andhemaintains and repairs the tool set in the lab. He also has several years of experience in circuit edit using dual beamFIB tools. Furthermore, he is responsible for newdevelopments and improvement of advanced techniques in physical failure analysis and defect localization. Heiko Barth has been a laboratory technician in physical failure analysis since 1998, working in various semiconductor technology companies. The focus of his work at PFA Lab GlobalFoundries Dresden is always looking for and finding defects using new preparation methods. During his career in fault analysis, he became familiar with the use of dual beam FIB tools, acoustic microscopy, x-ray, EDX, and light microscopy. Barth has a special interest in solving difficult preparation tasks. His expertise ranges fromPCB cracks to transistor gate oxide defects, including anomalies in capacitors, diodes, resistors, and dendrite growth on circuit boards.