Aug_EDFA_Digital

edfas.org 5 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 23 NO . 3 the IV curves (gate current versus gate voltage) of discrete transistors in a typical wafer that has been damaged; the center-sites (top curves) show a much-elevated current compared to those in thenon-center sites (bottomcurves). Optically, defects were also observed in the middle of the wafer that were not found in other parts of the wafer (Fig. 2). DISTINCT TIVA-SIGNAL PATTERNS TIVA was used to examine the four failing ICs that were packaged from the dies in the center of a damaged wafer (Fig. 3). TIVA signals from these four samples do not show any localized signals. Instead, they show multiple dark diffuse signals with distinct directionality. The TIVA directionality is highlighted by the orange dashed lines in the right image of Fig. 3. Interestingly, the TIVA signals of samples fromdie (6, 4) and die (5, 5) have the same direc- tionality; all the TIVA signals are slanting from the upper right toward the lower left (middle image of Fig. 3). The TIVA signals of samples from die (6, 5) and die (5, 4) have the same directionality that is opposite to that from die (6, 4) anddie (5, 5); they are slanting fromupper left toward the lower right corner (middle image of Fig. 3). ESD/EOS DAMAGES Triboelectric charging and discharging can cause ESD/EOS damage in devices. An example of this damage is shown in Fig. 1 where the elevated gate leakages were observed in the transistors from the wafer center. This increase in gate leakages is most likely the result of gate rupture that occurs during the triboelectric charging and discharging. The second example is shown in Fig. 2where many defects are observed in the wafer center; these defects are due to the breakdown of dielectric between top-level metal straps used for CMP density fill. The final example is shown in Figs. 4 and 5. Figure 4 shows the Fig. 3 Locations of four failed samples in a wafer are shown in the left image. The variation in the TIVA-signal directionality of these four samples is shown in the middle image. The raw TIVA signals of sample from die (6, 4) are shown in the right image. Fig. 4 Optical image of a failed transistor showing a defect (denoted by a black arrow) near the transistor. [1] Fig. 5 Corresponding SEM image of a FIB cross section near the defect site shown in Fig. 4. [1]