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edfas.org ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 23 NO . 3 4 EDFAAO (2021) 3:4-7 1537-0755/$19.00 ©ASM International ® TRIBOELECTRIC CHARGING DAMAGE IN SILICON-ON-INSULATOR DEVICES Paiboon Tangyunyong Sandia National Laboratories, Albuquerque, New Mexico ptangyu@sandia.gov INTRODUCTION Triboelectric charging refers to the charging by friction that can, for example, occur during the rubbing of two surfaces. Triboelectric charging can also occur during fabrication and packaging of integrated circuits (ICs). Water-based processing steps are the most likely steps that cause triboelectric charging; these steps include water cleaning and rinsing associatedwith de-ionized (DI) water, such as wafer spin cleans, chemical-mechanical polishing (CMP) rinses, water rinses during die saw, and packagewash steps. All these steps involve high-pressure DI water spray through nozzles into ICs. High resistivity in the DI water is the main culprit of the triboelectric charg- ing. Triboelectric charges can exist in the spraying water streams. These charges can accumulate on the devices anddischarge across some connectionpaths, thus causing damage. Depending on thewater spraying conditions, the triboelectric discharge can sometimes cause significant damage similar to that observed during electrostatic discharge (ESD) or electrostatic overstress (EOS) events. Some mitigation steps to reduce the effects of tri- boelectric charging include adjusting the flow rate of the water stream, grounding the spray nozzles, using conductive spray nozzles, and introducing carbon dioxide into the DI water to reduce the resistivity. This article will not focus on discussing mechanisms of triboelectric charging and discharging, nor describe any failure analysis (FA) steps or procedures to analyze the triboelectric charging damage. Instead, the focus is to look at some distinct characteristics that are typical of the damage [1,2] incurred by triboelectric charging and discharging on silicon-on-insulator (SOI) devices for both wafers and packages. The following sections discuss several telltale signs of potential triboelectric charging and discharging damage. These signs include changes in electrical characteristics on the affected devices, distinct patterns in the thermally induced voltage alteration (TIVA) signals, [3] and physical damage at both wafer and package levels. SPATIAL DEPENDENCY Most triboelectric charging damage exhibits spatial dependency. Failed devices are mostly found in the wafer’s center [1] due to the positioning of a water nozzle in the middle of the wafer during cleaning and rinsing. In other words, the center of the wafer is experiencing the highest-pressurewater spraywith largest accumulation of charges, thus potentially causing the largest damage due to subsequent discharging. Figure 1, for example, shows Fig. 1 Comparison of IV curves of failed (top curves) and normal (bottom curves) discrete transistors. Failed transistors are located at thewafer center withmuch elevated gate currents. [1] Fig. 2 Optical image of test structures at the center ofwafer, showing defects due to the dielectric breakdown between top-level metal straps.