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edfas.org 15 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 23 NO . 2 22 nm FinFET technology, was obtained from a store and disassembled. A sample was prepared from a random region and measured with a 3D resolution of 14.6 nm, which similarly to the previous case allowed visualizing the connectome down to the transistors. A video of the 3D renderings of both chips imaged is accessible through the link provided by the QR code in the inset of Fig. 3. [23] The imaging demonstrates that PXCT is capable of imaging ICs of known and unknown design. With a 3D reconstructed volume, virtual slicing is possible in arbitrary directions, in strong contrast to physical slicing and imaging-basedmethods, where the sample preparation determines the direction on which high quality and resolution can be attained. Additionally, the samples are preserved in the case of PXCT after the measurement and therefore are available for further investigation using complementary techniques. PXCT can also contribute to other areas of electronics manufacturing. For example, the technique has beenused to analyze solders in advanced electronics manufactur- ing. Here silver sintered powders show benefits over conventional solders in terms of mechanical, electrical, and thermal properties. However, because of potential environmental and health issues, the use of nanoparticles is undesirable. Multiscale silver paste is a promising solu- tion, as it combinesmicron-sized particleswith nanoscale features. The combination of volume and high resolution reachable via PXCT allowed understanding correlations between mechanical properties and morphological parameters to improve the designs of the material. [24] 3D PTYCHOGRAPHY WITH ZOOMING A clear disadvantage of PXCT for imaging parts of an integrated circuit is the effortful sample preparation. A region of interest, limited in size, has to be selected prior to the measurement and extracted from the flat chip. In addition, while themeasurement itself is nondestructive, the sample preparation is destructive. However, it’s been previously shown that it is possible to image much larger extended regions of ICswhen imaging in 2D, and that there the imaging area can be freely chosen. [10] It is thus desirable to image extended samples to avoid this sample preparation step and choose regions of interest in the chip and image directly in 3D. However, whenmounting an extended chip in a tomography geom- etry, angular sampling over a full range of 180 degrees is not possible. The sample thickness increases when moving toward grazing incidence, and space constraints in the x-ray setup limit the angular range. This problem can be alleviated in the laminography geometry. [25-27] Ptychographic x-ray laminography (PyXL) was devel- oped to access nanoscale features in this geometry. [28] In contrast to tomography, where the axis of rotation is per- pendicular to the x-ray propagation direction, the angle between the rotation axis and the beam propagation is smaller in the case of laminography. In the setup of a dedicated microscope called laminographic nano imag- ing (LamNI), [29] this laminography angle is 61 degrees. Figure 4a shows the PyXL geometry and Fig. 4b a render- ing of the LamNI microscope. The x-ray beampropagates from right to left. Similar to the setups shown previously, a lens is used to define the beamon the sample. A rotation stage is mounted at the laminography angle and carries a 2D piezo scanner to finely scan the sample in a plane perpendicular to the axis of rotation. While this scan- ning range is only 100 µm x 100 µm, it can be extended by using coarse positioning stages. Laser interferometry measures the relative position of the sample with respect to the lens, similar to the tomography setup, and enables accurate sample positioning. Further details can be found in Holler et al. [29] To demonstrate the imaging of ICs via PyXL a chip with general purpose logicmanufactured in 16 nmFinFET technology was selected. The only sample preparation required was a mechanical polishing of the silicon sub- strate to a thickness of 20 µm to achieve sufficient x-ray transmission at the 6.2 keV photon energy used. In addition to being nondestructive, PyXL offers imagingat various levels of resolution. Todemonstrate this feature, a large field of view covering 300 µm x 300 µm at a low 3D resolution of 500 nmwas measured. In a second Fig. 3 3D rendering of the tomography measurement of the ASIC. (a) View into the entire structure cut open in half with a circuitry extruding and color coded in the bottom region. The connectome to individual transistors can be followed. (b) Viewof a smaller region in the transistor region. Thearrow points to an imperfect gate. A video of the 3D rendering is available at https://doi.org/10.1038/nature21698. [23] (a) (b)