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edfas.org 13 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 23 NO . 2 STATE-OF-THE-ART HIGH-RESOLUTION 3D X-RAY MICROSCOPY FOR IMAGING OF INTEGRATED CIRCUITS Mirko Holler, Manuel Guizar-Sicairos, and Jörg Raabe Paul Scherrer Institut, Switzerland mirko.holler@psi.ch EDFAAO (2021) 2:13-19 1537-0755/$19.00 ©ASM International ® INTRODUCTION The imaging of integrated circuits (ICs) for failure analysis and verification of design and production quality control requires covering many different length scales. Currently this requires using a variety of different probes, from optical microscopy, which includes micrometers up to millimeters, to the highest resolution with electron microscopy at the nanometer scale. Over the past years, ptychographic 3D x-ray imaging has been developed in various modalities with the goal to significantly improve the resolution of established x-ray microscopy schemes. The method is very well suited for imaging of ICs. This article covers the evolution of IC imaging from 2D, 3D via ptychographic x-ray computed tomography, to the latest development: 3Dptychographic laminographywith zoom, which permits preparing entire chips as samples and imaging regions of interest at various resolution levels. X-RAY PTYCHOGRAPHY FOR IMAGING OF INTEGRATED CIRCUITS Ptychographic x-ray imaging can be applied to many problems ranging from biology to materials science. This article describes how themethod is used for investigating integrated circuits. Figure 1a shows the basic arrange- ment of an early 2D experiment, [10] other measurements of integrated circuits using ptychography have also been reported. [11,12] The coherent x-ray beam at 6.2 keV photon energy is coming fromthe left and illuminates a diffractive x-ray lens, a combination of a Fresnel zone plate (FZP) and order sorting aperture (OSA), that is used to define the beam in the experiment. To emphasize: this lens, placed before the sample, is used tocreatea confined illumination but is not required for the imaging process. The sample is placed after the focal spot where the beam reaches a suit- able size, in this example, a diameter of 10 µm. The chip measured was an application specific integrated circuit, manufactured in the 110-nmnode and designed at PSI. [13] The backside of the chip was etched to a thickness of 10 µm to increase its transmission. After interaction with the sample, the diffracted light propagates to a 2D detector installed at a distance of 7.2 m. The sample was scanned with an average step size of 3.5 µm and at each spot a coherent diffraction pattern was recorded, one of which is depicted in Fig. 1a. The scan covered an area of 500 µmx 290 µmand almost 12,000 diffraction patterns. A sub-region of the reconstructed image, covering one func- tional unit of the periodic ASIC, is shown in Fig. 1b. Further zooming and the availability of the chip’s design file allowed aligning themeasurement and the design to iden- tify the various elements of the circuit (Fig. 1b,c). Clearly, when measuring a projection through a layered device (Fig. 1d), one integrates over the different layers of the structure, whichmakes it impossible to investigate layers or their interconnects individually. Yet, thismeasurement demonstrates the power of ptychographic imaging: The radiationcanpropagate through theentireactive structure of the chip, and with a beam size of 10 µm and a step size of 3.5 µm, the half-period resolution reached in this case was 40 nm. Note, all resolutions quoted in thismanuscript will refer to half-period resolution. The imaging area of 500 µm x 290 µm was only limited by measurement time used, in this case 70 minutes. PTYCHOGRAPHIC X-RAY COMPUTED TOMOGRAPHY To separate and investigate different IC layers indi- vidually requires 3D imaging. This is enabled by acquiring many 2D images projecting at many sample orientations via ptychography and then reconstructing a 3D volume via computed tomography. The first demonstrationof ptycho- graphic x-ray computed tomography (PXCT) in 2010 at PSI