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edfas.org 39 ELECTRONIC DEV ICE FA I LURE ANALYSIS | VOLUME 25 NO . 1 in the milling approach. The user group posed a question about delayering techniques for nanoprobing, specifically tocontact layers containing cobaltmetal. Stokes explained that a combination of precursor chemistry, optimized beam profiles, and application recipes had been used successfully to delayer these types of samples uniformly and accurately to the contact layers. Finally, Edward Principe, Synchrotron Research, presented the current and potential future applications of the combination of cryogenic FIB-SEMwith secondary ion mass spectroscopy (SIMS). Cryogenic FIB-SEMhas become more broadly used in recent years due, in part, to the increase in cryogenic transmission electron microscopy (STEM) sample preparation, requiring the development of cryogenic compatible lift-out systems. SIMS is a surface analytical technique widely used throughout the semiconductor industry which measures the charge-to-mass ratio of the sputtered ionized species to determine both elemental andmolecular constituents at higher sensitivity than energy dispersive spectroscopy. The combination of cryo-FIB-SIMS offers additional unique capabilities in terms of both the analytical information and the type of materials which can be addressed, including biological and other soft materials. For example, Principe gave an example of a mass spectrum taken from a cross-section of a zinc oxide cream. FIB-SIMS additionally enjoys the advantage over high mass resolution dedicated SIMS instruments through the ability to combine nanometer scale electron and ion imaging on a FIB-SEMplatformwith co-located mass spectroscopy. Questions from the audience includedconcerns about navigationdue to stage limitations imposed by cryogenic cooling systems. There is no question that sample manipulation and stage navigation is encumbered by the mechanical hardware associated with the cryogenic cooling stages. The advent of smaller form factor cryogenic stages involving more elegant and less bulky design elements is expected to further improve the functionality and accessibility of cryo FIB-SIMS. ISTFA 2022 SAMPLE PREP USER GROUP Chair/Co-Chairs: Jim Colvin, Cecile Bonifacio, Kah Chin Cheong, and Nathan Bakken jim@fainstruments.com, cs_bonifacio@fischione.com, kah.cheong@samsung.com, nathan.j.bakken@intel.com The change in having a single user group session this year garnered increased attendees. The Sample Preparation User Group discussion was held with more than 100 attendees. The highlights of the session included a technique in extracting a die from a package with subsequent reballing, aspects of delayering, and backside preparation. Kah Chin Cheong, Samsung Austin Semiconductor LLC, presented amethod to remove a chip-scale-package (CSP) die from a PCB module and subsequently reballing the die. Cheong discussed five steps in successfully removing the CSP die and then reballing for further ATE or electrical testing. He asked the audience for better methodology as he is looking for a more efficient technique. Bryan Tracy, Tesla, asked specifically what he is looking to improve in his technique. Cheong indicated he would like to find a better way to keep the quality of work and simultaneously reduce the overall turnaround time. Part of the discussion was the safety concern with the solvent used for the process. Cecile Bonifacio, Fischione Instruments, presented on behalf of Pawel Nowakowski, who was unable to attend due to travel issues. Nowakowski’s talkwas on the aspects of delayering. The presentation posed questions to the audience as far as what delayering technique does the audience need based on their application: is the delayered area the same for all applications or the application determines howbig of an area? The presentation showed that successful delayering by ionmilling-based technique requires a flat starting surface. A lively discussion was started with Kristofor Dickson, NXP, who specified that currently the plasma FIB is used for delayering in their lab. SteveHerschbein responded that reverse engineering applications benefits from8 to 10mmdelayered area. Yan “THE HIGHLIGHTS OF THE SESSION INCLUDED A TECHNIQUE IN EXTRACTING A DIE FROM A PACKAGE WITH SUBSEQUENT REBALLING, ASPECTS OF DELAYERING, AND BACKSIDE PREPARATION.”

RkJQdWJsaXNoZXIy MTMyMzg5NA==