February_EDFA_Digital

edfas.org 7 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 23 NO. 1 As the corroded area was not spread over much of the Cu surfaces and was only found for a unit from the 96 hr autoclave exposure, and not on any units from the 168 hr autoclave exposure; it can be concluded that the BOM is not the cause of corrosion. The evidence of corrosion from a randomcontaminant trappedat thedie/moldcompound interface during themanufacturingprocesswas preserved by means of atmospheric pressure MIP. CASE STUDY III: EOS REMOVAL OF CARBONIZED MOLD COMPOUND [3] Electrical overstress (EOS) may induce a carbonized mold compound cap covering the EOS failure site. Car- bonized mold compound is often very difficult to remove using aciddecapsulation. Attempting to further process an already partly exposed sample using acid decapsulation or conventional halogen-containingplasmadecapsulation can induce artifacts and alter the original EOS features, passivation layer, or die structures. After EOS has been detected, further failure analysis of its root cause in the die circuitry level is often limited due to the carbonizedmold compound residue that blocks the direct access to the EOS site and hinders further inspec- tion. Further analysis can be done by backside milling; however, this requires multiple processing steps and is very time consuming. As the atmospheric pressure MIP decapsulation process used in this study is highly selective, and only etches organic material, the carbonized mold compound canbe selectively removedwhile theoriginal EOS sites and the die beneath the broken passivationwill not be altered by the decapsulation process itself (see Fig. 7). APPLICATION EXAMPLE I: SYSTEM IN PACKAGE [4] The continuous drive toward semiconductor min- iaturization and integration has quickly unveiled the potential of system in package (SIP), a package or module containing an electronic system or subsystem that is integrated through IC assembly technologies. To ensure a high success rate inSIP failure analysis and thus guarantee the quality and reliability, it is vital that all components as well as original failure sites inside the package can be exposed and preserved. The decapsulation of SIP modules can be very chal- lenging as a wide spectrum of materials and packag- ing structures such as chip scale package, package on package, BOAC, stacked dies, surface acoustic wave and bulk acoustic wave filters, and GaAs can often be inte- grated in a single module. Most of these materials and structures are susceptible to conventional acidor halogen- containing plasma decapsulation. The components inside a SIPmodule are often located at different heights, and there can be amixture of different mold compound materials located on different layers in the SIP. This is particularly challenging for decapsulation processes, as certain components will be exposed for longer periods of time and subjected to the etching agent. Fig. 8 A 26 mm x 29 mm SIP module after acid decapsulation (left) and after MIP decapsulation (right).