February_EDFA_Digital

edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 23 NO. 1 2 PURPOSE: To provide a technical condensation of information of interest to electronic device failure analysis technicians, engineers, and managers. Nicholas Antoniou Editor/PrimeNano nicholas@primenanoinc.com Scott D. Henry Publisher Mary Anne Fleming Manager, Technical Journals Kelly Sukol Production Supervisor Joanne Miller Managing Editor Victoria Burt Contributing Editor ASSOCIATE EDITORS Navid Asadi University of Florida Guillaume Bascoul CNES France Felix Beaudoin GlobalFoundries Michael R. Bruce Consultant David L. Burgess Accelerated Analysis Jiann Min Chin Advanced Micro Devices Singapore Edward I. Cole, Jr. Sandia National Labs Szu Huat Goh GlobalFoundries Singapore Ted Kolasa Northrop Grumman Innovation Systems Rosalinda M. Ring Howard Hughes Research Labs LLC Tom Schamp Materials Analytical Services LLC David Su Yi-Xiang Investment Co. Paiboon Tangyunyong Sandia National Labs Martin Versen University of Applied Sciences Rosenheim, Germany FOUNDING EDITORS Edward I. Cole, Jr. Sandia National Labs Lawrence C. Wagner LWSN Consulting Inc. GRAPHIC DESIGN Jan Nejedlik, designbyj.com PRESS RELEASE SUBMISSIONS magazines@asminternational.org Electronic Device Failure Analysis™ (ISSN 1537-0755) is pub- lished quarterly by ASM International ® , 9639 Kinsman Road, Materials Park, OH 44073; tel: 800.336.5152; website: edfas. org.Copyright©2021byASMInternational.Receive Electronic Device Failure Analysis as part of your EDFAS membership. Non-member subscription rate is $160 U.S. per year. Authorizationtophotocopy itemsfor internalorpersonaluse, orthe internalorpersonaluseofspecificclients, isgrantedby ASM Internationalfor librariesandotherusersregisteredwith theCopyrightClearanceCenter(CCC)TransactionalReporting Service, provided that the base fee of $19 per article is paid directlytoCCC,222RosewoodDrive,Danvers,MA01923,USA. Electronic Device Failure Analysis is indexed or abstracted by Compendex, EBSCO, Gale, and ProQuest. I n the embeddednon-volatilememory (eNVM)market, one technology is king: flash. Flash has been the bedrock acrossmanymarkets and it has a long history of production. As certain as its position in today’smarket is the certainty that it will not scale below about 28 nm. The cost adders have become too great, andone ormore neweNVMneeds to take its place as customers scale their solutions past 28nm into 22/18/16/12 nm nodes. Just like railroads in the 19th century, or CPUand operating systems in the early 1980s, there aremany contenders: phase changememory (PCM), resis- tive RAM (ReRAM, both the oxide trap – OxRAM – and the metal connection – CBRAM- types), ferro cap, ferro FET, charge coupled transistor (CCT), to name a few. But similar to what has happened in the past to railroads, operating systems, and CPU families, themarket will quicklywinnow the options down. One of the leading eNVMs is magnetoresistivememory (MRAM), especially the spin transfer torque (STT) MRAM (Fig. 1). Situated in the backend of line, it consumes less silicon area, and is easier to integrate across platforms. Unlike many of the eNVMoptions, its func- tion does not depend on “moving” material like ions, changing physi- cal state, or storing charge directly. This implies a higher endurance. It has its share of issues as well: it never truly turns “off” like a transistor, and so care must be taken with the memory window; it is susceptible to magnetic interference, externally or at high densities from other bits, its complexity is a natural drag on yield, and it is difficult to make robust to solder reflow, to name a few. However, it has a production history, and seems to be a strong contender across the different foundry providers. For failure analysis, MRAM presents new challenges compared to CMOS: • Complex structure: The MRAM device consists of many very thin layers, more than 10 layers is common, many of which are < 20 Å thick, with various purposes: free magnet, fixed magnet, current barrier, lattice matching, etc. Several of these layers have a critical dependency on FEBRUARY 2021 | VOLUME 23 | ISSUE 1 A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS ELECTRONIC DEVICE FAILURE ANALYSIS GUEST EDITORIAL MRAM PRESENTS NEW FACE OF eNVM, AND NEW FA CHALLENGES Joe Versaggi, GlobalFoundries joe.versaggi@globalfoundries.com edfas.org (continued on page 44) Versaggi Fig. 1 Generic STT MRAM. Note that several layers shown here can be themselves multilayer.