November_EDFA_Digital

edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 22 NO. 4 22 detection are improved with increased frequency, the actual resolution is limited by material properties. Color maps are used to highlight regions of interest (ROIs) in the C-scan image. Two standard-color maps shown in Fig. 3 are generally used for reflection-mode scans: an asymmetrical white-color to red-color map, and a symmetrical black-color to white-color map. The asymmetrical map provides the polarity details, while the symmetrical map provides the magnitude information of thedetectedwaveformat that location. Although theseare the two default color maps, custommaps can be used to enhance the visual distinction between the ROI and the background. Using a colormapwith a higher gradient can help delineate subtle feature. FA CASE STUDIES The following case studies were selected to demon- strate someof the capabilities andapplications of theSAM. CASE #1: F 0 = 100 MHz In this study, the multilayer ceramic chip capacitor (MLCC) failed due to an out-of-specification value. Figure 4 contains an optical image, SAM image, and subsequent SEM images of the mechanical cross section of the observed failure site. The SAM image clearly shows a ROI and subsequent examination of the reflections suggested it was a delaminated region. The delamination shown in the reflection CSAM image (left center image in Fig. 4) shows good correlation with the two SEM images to the right. This CSAM image is a good example of how to use a non-standard color map to highlight the ROI. Subsequent cross sections confirmed a knit line delamination located between the capacitor plates (right center image in Fig. 4). The estimated depth based on the CSAM data showed good correlation to the actual location validated by physical cross sectioning. In this example, the defect area was easily detectable but differences in the cross-sectional image and the CSAM image illustrate that the resolution was not sufficient to determine feature dimensions. CASE #2: F 0 = 100 MHz In this study the MLCC failed electrical testing due to a resistive short between the endcap terminals. In Fig. 5, the leftCSAM image shows a ROI in the corner of the MLCC in analysis of the signal waveform indicating that it is a fracture region. In this image, the reflection-mode CSAM imagewas overlaidonto the optical image to further highlight the ROI. Thewhite arrows indicate the outline of the perimeter fracture site. Because the fracture extended to the perimeter of the part, water ingress had to be accounted for during the imaging and analysis. The right-hand image shows the results of using a standard color map on a similar MLCC failure with no optical image overlay. CASE #3: F 0 = 50 MHz In this study, a thick-film, ceramic-chip resistor failed electrical testing as an open circuit. The CSAM image in Fig. 6 shows a ROI at the end of the L-trim. The right CSAM image (focused on a plane deeper into the part) shows additional ROIs located near the edge of chip Fig. 4 Ceramic capacitor optical image, left, CSAM reflection scan image, left center, SEM images, center right and right. Red arrows indicate path of delamination. Far right SEM image is the same fracture site indicated by arrows in the center right image. Fig. 5 The left side shows a superimposed CSAM and optical image of a cracked ceramic capacitor with the white arrows highlighting the fracture path and the right side shows an CSAM image of a delaminated ceramic capacitor with the entire horizontal layer delaminated at the ceramic/capacitor plate interface.