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edfas.org 5 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 22 NO. 2 The workhorse sacrificial material in mechanical cross-sectioning is epoxy. [16] A vertically oriented sample is cured in epoxy andmechanically polished until the site- of-interest is reached, which can then be imaged. Though a low cost technique, a major limitation of this technique is the long polishing time involved, especially in the case of larger semiconductor packages. The polishing time increases exponentially with the increasing diameter of the epoxy puck, which is deter- mined by the longest dimension of the sample cross- section. If the puck is rectangular or has a high aspect ratio, it can very easily get tilted during the polishing process, causing a non-uniform surface finish. As a result of the sizing constraints, the actual cross-section of the sample is a small fraction of the surface of a circular puck, the remainder of which is epoxy. Because it is centered in the epoxy puck, the sample itself experiences the lowest MRR of the cross-sectional polishing surface. Moreover, the sample consists of the silicon die, metallic solder bumps, and laminate, so it has a higher pattern density relative to the surrounding epoxy. Owing to the delicate nature of semiconductor samples, there are additional limitations on polishing speeds and aggressive abrasives. Higher speeds and coarser abrasives can cause cracking, delamination, and gross damage to the sample. Better control is achieved by using slower polishing speeds and fine abrasives; however, this can further increase the pol- ishing time. The options for zonal pressure control offered by typical polishing equipment in failure analysis labs are few to none, limiting the possibility of increasing the MRR in the center of the puck, where the sample is located. Epoxy pucks can also be challenging to work with when imaging the polished cross-section in the scanning electron microscope (SEM). The epoxy itself is insulating so there is severe charging of the sample surface under the electron beam. A thin conducting layer, typically depositedon the sample surfaceprior to imaging, canhelp reduce the surface charging in some instances, but it is not always successful. Another drawbackwith the epoxy puck is that once impregnated, it is very difficult to remove the sample from the epoxy. In many cases, after mechanical cross-sectioning analysis has been completed, it may be deemed necessary to perform additional analysis on the sample, such as transmission electron microscopy or elemental analysis, with which the large size of the epoxy puck is not compatible, making further analysis on the sample more complex. From the Preston model, there is opportunity to ach- ieve a greater effective vertical pressure for the same applied vertical force by reducing the cross-sectional area, resulting in a larger MRR. Based on the learning from wafer-level CMP, MRR can be further increased by minimizing the epoxy surrounding the sample or by ori- enting the sample closer to the edge of the epoxy puck. However, it is advantageous to retain the circular shape of the puck to promote stability and prevent tilt during the polishing process. Unlike the case of wafer-level CMP, where the entire continuous surface area of the wafer must be polished, the epoxy surrounding the sample in mechanical cross-sectioning is sacrificial. If sections of the epoxy can be left offwhile retaining the outer shape of the puck, it is possible to reduce the effective cross-sectional area and simultaneously introduce more edge regions in the puck. In this study, the epoxy puck used for mechani- cal cross-section samples has been modified to reduce the polishing time. Additionally, further iterations to the modified design are explored to reduce surface charging in the SEM and to achieve a flexible design that allows for sample removal from the epoxy, enabling subsequent analysis as needed. EXPERIMENT PROCEDURE Commercially available equipment and consumables were used for all experiments. The delidded flip-chippack- aged samples, shown in Fig. 1, were diced on an automat- ed dicing sawand then impregnated in epoxy. Figure 1a is a top-view schematic of the sample, the dicing locations, and the polishing direction. Figure 1b is the cross-section viewof the sample showing the die, the laminate, and the ball grid array (BGA) bumps. Figure 1c is a zoomed-in view of the region highlighted by the red box in Fig. 1b showing the SnAg controlled collapse chip connection (C4) solder bumps connecting the die to the laminate. Figure 1d is a schematic of the diced sample impregnated in an epoxy puck. A two-part clear epoxy consisting of resin and hard- ener was used; the optimal proportion of the two compo- nents was determined empirically. Teflon cups were used asmolds for the conventional puck and custom-designed molds were fabricated in the case of the modified puck and its revisions. The liquid epoxy mixture was poured into the respectivemolds, with andwithout samples, and allowed to cureunder ambient conditions. Once curedand removed fromthemolds, the hardened epoxy pucks were ready for polishing. Conductive epoxy sectionsweremade by adding a Ni-based powdered conductive filler in the liquid epoxy mixture before curing. Mounting wax, where used, was a lowmelting temperature temporarymounting wax typically used inmicroscopy labs. All polishing experi- ments were conducted on a semi-automatic polisher with capability to polish multiple samples simultaneously.