May_EDFA_Digital

edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 22 NO. 2 24 Fig. 4 (a) Zoom in of SCM image. All transistors in bits 1-3 (outlined in yellow) were probed. nFETS PGs and pFETs PUs are labelled for clarification. (b) Layout of single bit for comparison to SCM image. (c-f) Nanoprobing data, saturation regime, for nFETs in cells 2 and 3. All plots show absolute source-drain current (Ids) as a function of gate voltage (Vg) in the saturation regime. In all plots, failing transistors are in red, passing transistors are in green, and a reference transistor is in black. (c) Cell 2 PGs, (d) cell 3 PGs, (e) cell 2 PDs, and (f) cell 3 PDs. (a) (b) (c) (d) (e) (f) Fig. 5 Nanoprobing data, saturation regime, for pFETs in bits 2 and 3 (a and b, respectively). No difference is observed between reference transistor (black) and transistors in failing bits (blue and green). Looking closely at the SCMdata for the failing PG in cell 3 compared to the failing PG in cell 2, it is seen that in cell 3, there is some n-type SCM signal in the source contact (S3) and no n-type SCM signal in the drain contact (D3). In contrast with cell 2, both source (S2) and drain (D2) contacts did not show any n-type SCM signal (Fig. 4b). This can explain the asymmetric nature of the nanoprobing data for cell 3 in that there exists a difference in the contact resistance of S3 vs. D3. Furthermore, the difference in Idsat between the failingPGs anda reference PG is larger for cell 2 vs. cell 3. This is consis- tent with a lower Idsat in cell 2 PG compared to cell 3 PG. This is not surprising, given that the S3 contact SCM signal is larger than that observed for the S2 contact. SCM and nanoprobing analysis of a third cluster defect was also completed inorder to gain more data for correlation between the SCM signals and the device performance. Figure 7 shows the SCM data (a) and layout (b) of this final cluster defect. The results are similar to that of the previous defect in that multiple nFET contacts within the AOI have either diminishedor lack SCMsignal. For this location, the nanoprobing focused on a few specific transistors in the array which had a variation inSCMsignal to try andunderstand the sensitivity of the SCM signal to these types of resistive fails. Figure 8 compares the SCM data and nanoprobing measurements for a series of nFETs with various contact resistance scenarios. Data is shown here in the linear regime for clarity of discussion. There is a good agreement in the transistor perfor- mance for PD and PG reference transistors (black and gray, respectively). PDs and PGs are compared in the discussion. When one of the source/drain contacts has a reduced SCM contrast as in the PD cell 7 and PG cell 9 (green and red, respectively), there is a partial reduction in the Idsat of ~2 orders of magnitude compared to the refer- ence. The transistor performance for these two transistors overlays nicely, and the line scans of the SCM data show they both have comparable SCM signals, on the order of 0.2V. When the SCM signal is further reduced to 0 for one of the source/drain contacts in the transistor, a further reduction in Idsat is observed (cell 8 PG, yellow). In all three of these cases where only one contact is affected, the transistor shows asymmetric behavior in the saturation regime (Fig. 9). In the case of PG cell 7, both source and drain show SCM signals ~ 0.8V compared to an average of 1V for all “good” contacts.