November_EDFA_Digital

edfas.org 27 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 21 NO. 4 metal level (Signal B), clearly suggesting that the two are shorted. The networks cross each other at four different locations where the short could be located, hence all four sites were investigated. The short investigation procedure was followed. The microscope stage was tilted to FIB position at 54° and the probes were aligned and landed on their respective contacts (ground pad and Signal A). For each crossing point, rapid EBAC images were taken at intervals during the FIB milling of Signal B and used to determine when the track is successfully cut. High quality EBAC images, taken at the FIB tilt position before and after each cut, are reported in Fig. 9. At crossing points 1 and 2, Signal B did not turn dark after the FIB cuts, indicating that there is no short at these locations. After the cut at crossing point 3, Signal B did turn dark except for its part located directly near this crossing point, clearly highlighting the existence of a short at this crossing point. This conclusion is also confirmed by the EBAC image made after the third cut at crossing point 4: Only Signal A is lighted up as the short was isolated. At this point, a semiconductor FA engineer has high confidence that the defect in the faulty device was localized with precision. The engineer can proceed with further investigations to characterize the source of this defect, for instance by making cross sections in the area of the crossing point or by preparing TEM lamella. CONCLUSION In this article, two use cases of common semi- conductor failure analyses are presented, namely circuit editingand short localization. Theydescribe aworkflow that combines FIB, GIS, and nanoprob- ing techniques. All procedures areperformedat the FIB tilt position (54°), avoiding the need to bring themotorizedmicroscope stage back tohorizontal position for nanoprobing after each FIB process. This provides several advantages, starting with the ability to greatly reduce the time required for investigations. Avoiding unnecessarymovements also has the positive side effect of minimizing the risk of collisions inside the microscope chamber. Finally, the ability to monitor current flow in real time with nanoprobers in the device under test during a FIB process is another important benefit. This is done with either a source-meter unit or an EBAC imaging system, allowing researchers to achieve higher accuracy in terms of fault localiza- tion and performance of circuit modification. REFERENCES 1. J. Chin, V. Narang, X. Zhao: “Fault Isolation in Semiconductor Product, Process, Physical andPackage Failure Analysis: Importance and Overview,” Microelectron. Reliab., 2011, 51, p. 9-11. 2. L. Chang, K. Wang, and S. Wang: “The Investigation of Active VC and EBAC Analysis Utilization on Test Structure,” IEEE Proc. Int. Symp. Phys. Fail. Anal. Integr. Circuits (IPFA), 2015. 3. M. Simon-Najasek: “Defect Localization using SEM Based Current Imaging,” IEEE Proc. Int. Symp. Phys. Fail. Anal. Integr. Circuits (IPFA), 2018. 4. D.Verkleij: “The Use of the Focused Ion Beam in Failure Analysis,” Microelectron. Reliab., 1998, 38, p. 6-8. Fig. 9 EBAC images of crossing points before (left) and after the FIB cut (right). At crossing points #1 and #2, the FIB cut shuts off the part of the faulty network (Signal B) crossing with the valid network (Signal A), indicating there is no short at these two locations. At crossing point #3, the FIB cut does not shut off the part of Signal B, indicating the presence of a short. The last row con- firms the short is localized at crossing point #3 as Signal B has turned dark.