February_EDFA_Digital

edfas.org 31 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 21 NO. 1 and input current increase when the interval between power-off and power-on decreases. Tested current is high at 17.1A, far more than the fuse’s rated current of 3A. The gate drive circuit was then revised as shown in Fig. 2b, also without Q1 or D4. R1=10Ω. R2=30Ω. R3=3kΩ. Soft start-up timewas alsoprolonged from5 to 10ms. The gate drive signal was tested again at almost the same interval between power-off and power-on. Parasitic ringing still exists. However, amplitude is suppressed to less than the 2Vminimumgate threshold voltage and the fuse does not burn out again. CONCLUSION A low-frequency parasitic ringing potentially exists in the gate drive circuit of DC/DC converters. It can be excited by a sudden change of duty cycle and may cause a catastrophic failure. Experimental results confirm the parasitic ringing, fuse burnout, MOSFET failure, and thus the converter’s lack of output. This article also presents suggested gate drive circuits and other considerations. ACKNOWLEDGMENTS This work was financially supported by a Chinese satellite project. The authors also thank their many col- leagues at the Lanzhou Institute of Physics for their work and helpful suggestions. REFERENCES 1. B. Yao, H. Chen, X.Q. He, Q.Z. Xiao, and X.J. Kuang: “Reliability and Failure Analysis of DC/DC Converter and Case Studies,” IEEE International Conference on Quality, Reliability, Risk, Maintenance, and Safety Engineering (QR2MSE), July 2013, p. 1133-1135. 2. P. Jacob, G. Nicoletti, and M. Rutsch: “Reliability Failures in Small Optocoupling and DC/DC Converter Devices,” 13th IEEE Proc. Symp. Phys. Fail. Anal. Integr. Circuits (IPFA), July 2006, p. 167-170. 3. Y. Liu, Ch. Y. Huang, N.N. Shan, Ch. Zh. Lu, and G.B. Gao: “Failure Analysis of VDMOS in DC/DC Converter,” 16th IEEE Proc. Symp. Phys. Fail. Anal. Integr. Circuits (IPFA), July 2009. 4. X.J. Pei, S.S. Nie, Y. Chen, and Y. Kang: “Open-Circuit Fault Diagnosis and Fault-Tolerant Strategies for Full-BridgeDC–DCConverters,” IEEE Trans. Power Electron., 2012, 27 (5), p. 2550-2565. 5. N. Keskar, M. Trivedi, and K. Shenai: “Device Reliability and Robust Power Converter Development,” Microelectron. Reliab., 1999, 39 (6-7), p. 1121-1130. 6. B. Andreycak: “New Driver ICs Optimize High Speed Power MOSFET Switching Characteristics,” www.ti.com. 7. L. Balogh: “Design and Application Guide for High Speed MOSFET Gate Drive Circuits,” www.ti.com . Fig. 4 Gate drive waveform at start-up a short time after last power-off. Fig. 5 Input current at start-up a short time after last power-off. ABOUT THE AUTHOR Guo Xianxin is an electrical engineer for Chinese spacecraft. He hasmore than eight years of switch- ing power supply research and development experience. His research interests include low voltage high current DC/DC converters, pulse power supply, high voltage low current power supplies, and adjustable switching power supplies. Mr. Guo received a B.S. degree in electronic engineering from China University of Mining and Technology in 2007 and an M.S. degree in power electronics from the China Academy of Space Technology in 2010. He is currently pursuing a Ph.D. in power electronics at China Academy of Space Technology.