November_EDFA_Digital

edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 19 NO. 4 34 His work has been published in conference proceedings and journals. He was the technical program chair and general co-chair for the IPFA conference in 2016 and 2017. Dr. Goh also contributes actively in technical committees for the ISTFA and SEMICON Southeast Asia conferences. Edmund C. Manlangit received his B.S. and M.S. degrees in electrical engineering (microelec- tronics option) from the University of the Philippines in 2004 and 2007, respectively. In 2007, he joined Intel Technologies Philippines as an IC design engineer in the flash memory group. In 2011, he moved to Singapore and joined ST-Ericsson (eventually acquired by Intel Singapore) as a senior analog/radio-frequency design engineer for the near-field communication and global navigation satellite system development group. His research interests are in the low-power design of analog and radio-frequency front-end internet protocols. He is currently employed as a principal engineer at GLOBALFOUNDRIES, Singapore, where he does product diagnostic and debugging (IC layout and circuit analysis). Jeffrey Lam received his B.S. and M.S. degrees in chemical engineering from the University of California, Berkeley and theUniversity of California, Davis in 1979 and 1981, respectively. He obtained a second M.S. degree in electrical engineering and computer science from the University of Santa Clara in 1986. In 2014, he received his Ph.D. from the school of mathematics and physics at Nanyang Technological University. Dr. Lam is currently a vice-president at GLOBALFOUNDRIES, Singapore, where he is in charge of the Product/Test and Yield Engineering Department in technology develop- ment. He has more than 35 years of experience in FA, design, product/yield engineering, and test development. Dr. Lam holds 7 technical patents and has more than 20 publications. He has also been the chairman of the SEMI SGP Product and Test Committee since 2009, and he is an adjunct associate professor at the National University of Singapore. PRODUCT CIRCUIT VALIDATION AND FAILURE DEBUG (continued from page 31)