November_EDFA_Digital

edfas.org 27 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 19 NO. 4 Fig. 7 Testbench simulation modified workflow. The design layout is truncated, and a dummy netlist is used as the input file, because no source netlist is available. For hierarchical schematic extraction, a hierarchical cell file is required during the PEX process. In general, Cadence QRC [29] and Synopsys starRC [30] can be used as well. Figures 6(a) to (c) show the layout of a generic decoder, the corresponding extracted flattened transistor-level netlist, and the hierarchical netlist, respectively. With the PEX netlist, further testbench simulations can be performed (Fig. 7). For the purpose of debug, the circuit of interest can be characterized by assigning sources and sinks to emulate the postulated failing conditions (Fig. 8). CIRCUIT ANALYSIS ON ELUSIVE PHOTON EMISSIONS A systematic failure was encountered on first silicon, andphotonemissionmicroscopy isolated theproblematic Fig. 8 Characterization of sense amplifier circuit properties by assigning sources and sinks where appropriate PARASITIC EXTRACTION A more advanced approach to construct a small-area schematic is to leverage parasitic extraction (PEX), which is a standard procedure as part of the design presilicon validation process. The Mentor Graphics Calibre xRC parasitic extractor [28] is one example, and it is used in this work. Design layout, netlist, and techfiles are the inputs to the tool. Depending on the environment configuration, it is able to execute layout-versus-schematic (LVS) and PEX at the same time. An LVS report together with the parasitic netlist is generated in the process. The LVS compares the extracted transistor-level netlist against the source netlist for discrepancies, and the parasitic capacitances and resistances data can be stitched to achieve an accurate postlayout simulation for verification/debugging. Figure 4 shows a simplified block diagram workflow. For small- circuit schematic extraction, the LVS and parasitic data are not crucial and could be ignored. Figure 5 presents the