November_EDFA_Digital

edfas.org 1 ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 19 NO. 4 DEPARTMENTS Nanoscale Capacitance and Capacitance- Voltage Curves for Advanced Characteri- zation of Electrical Properties of Silicon and GaN Structures Using Scanning Microwave Impedance Microscopy (sMIM) Oskar Amster, Stuart Friedman, Yongliang Yang, and Fred Stanke Scanningmicrowave impedancemicroscopy provides the capability to directly probe a sample’s permittivity and conductivity at submicron geometries, providing valuable nanoscale information about semiconductor devices, processes, and defects. ABOUT THE COVER Seepage64 for adescriptionof the contestwinners’ collage on the cover. Author Guidelines Author guidelines and a sample article are available at edfas.org . Potential authors should consult the guidelines for useful information prior to manuscript preparation. 4 12 A RESOURCE FOR TECHNICAL INFORMATION AND INDUSTRY DEVELOPMENTS NOVEMBER 2017 | VOLUME 19 | ISSUE 4 edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS 46 SPECIAL! ISTFA 2017 SHOW LISTING 64 ADVERTISERS’ INDEX 34 SAVE THE DATE 54 DIRECTORY OF FA PROVIDERS Rose Ring 2 EDITORIAL Felix Beaudoin 62 GUEST COLUMNISTS Rao Desineni and Yan P an 44 INTERNET RESOURCES Rose Ring 50 INVENTOR'S CORNER Dave Vallett 60 LITERATURE REVIEW Mike Bruce 52 PRODUCT NEWS Larry Wagner 56 TRAINING CALENDAR Rose Ring Product Circuit Validation and Failure Debug: A Semiconductor Foundry Can Help Edy Susanto, S.H. Goh, Edmund C. Manlangit, and Jeffrey Lam Faster time-to-productionof a newproduct is the common goal of design houses and foundries. This article demon- strates how foundries can contribute through postsilicon validation, which allows design houses to focus on more complicated issues. 22 For the digital edition, log in to edfas.org , click on the "News/Magazines" tab, and select "EDFA Magazine." Failure Analysis of DC/DC Converters: A Case Study Jérémie Dhennin DC/DC converters are widely used in electronic applica- tions, especially in the aerospace industry. This case study discusses the challenges of adapting sample-preparation techniques for defect localization aswell as understanding the root cause of the failure. 36 Plasma FIB Deprocessing of Integrated Circuits from the Backside E.L. Principe, Navid Asadizanjani, Domenic Forte, Mark Tehranipoor, Robert Chivas, Michael DiBattista, and Scott Silverman Deprocessing of ICs is often the final step for defect valida- tion in FA cases with limited fault-isolation information. A workflow for deprocessing from the backside uses a com- bination of automated adaptive backside ultrathinning and large-area plasma FIB delayering. 4 12 36 22