FAILURE ANALYSIS OF ULTRA-EFFICIENT ELECTRONICS Abstract submission deadline: April 16, 2027 CALL FOR PAPERS NOW OPEN! OCTOBER 31–NOVEMBER 4, 2027 PHOENIX CONVENTION CENTER, PHOENIX, ARIZONA The U.S. Department of Energy estimates that since the beginning of this decade, energy use from microelectronics alone has expanded to account for over 10% of global electricity use. At the same time, innovations such as cloud infrastructures and AI have triggered an explosion in demand for high power computing and connected devices. The transistor densification realized from low supply voltages and nanometer scale process nodes ironically brings the revenge of Ohm’s law, where the latest AI device packaging is being designed to handle currents into the kiloamp range. This is driving the need to implement next-generation technologies to further improve device efficiency, power delivery, and thermal management and brings fresh challenges to the failure analyst. • Integration of voltage regulation and power management circuitry into the substrate • Co-packaged optics to efficiently increase communication bandwidth • FA of Ultra-Efficient Device Technologies • Emerging FA Techniques and Concepts • Die Level Fault Isolation • Design for Analysis, Test, and Diagnostics • Package Level Fault Isolation • System-in-Package and 3D Devices • Wide Bandgap Power Devices (SiC, GaN, new materials) • AI Applications for Failure Analysis • Boards and Systems • Novel materials for device construction and thermal management • On-chip integrated energy storage • Back-end fabricated devices to extend 3D integration Paper selection is based entirely on information submitted in abstracts and will be evaluated on novelty, completeness, quality, and benefit to the FA community. Abstracts should be a minimum of two pages long, including images and figures. References are required. Original, unpublished abstracts are solicited in the following topic areas: • Sample Preparation and Device Deprocessing • FIB Sample Preparation and Circuit Edit • Microscopy Analysis and Materials Characterization • Device Analysis Case Studies • FA Process and Workflows • Product Yield • Silicon Photonics and Co-Packaged Optics • Trusted Electronics Come to share your experiences and advance the industry and your career at the International Symposium for Testing and Failure Analysis, the premier event for the microelectronics failure analysis community. We invite you to submit your work for publication and to present it to the community in Phoenix, Arizona, for the 53rd year of ISTFA. • Original, unpublished, and novel material is being solicited on testing, analysis, characterization, and metrology of electronic devices and systems from the nanoscale and upward. • Case studies, review papers, and non-commercial work from vendors are encouraged.
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