edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 28 NO. 2 38 A technical challenge in this phase is the opacity of silicon to certain IR wavelengths. However, by utilizing phase and amplitude overlays and thinning the die, thermal radiation migrating to the surface can be tracked. Wide-angle captures initially identified a region of interest (ROI) at the lower right quadrant of the silicon die. Highmagnification (1X and 5X) captures further refined this, revealing that while some heat was conducted through package traces, the primary source of thermal activity was localized within the die itself. PHASE 4: PRECISION ISOLATION WITH LASER-BASED PROBING (TIVA) To achieve transistor-level precision, the methodology transitioned to laser-based stimulation. The silicon die was thinned to 50 µm and treated with an anti-reflective coating to enhance optical accessibility. The device was then docked to a thermally induced voltage alteration (TIVA) system. TIVA utilizes a 1340 nm laser beam to scan the circuit, inducing localized thermal gradients. As the laser interacts with a defect, the resulting change in resistance causes a measurable shift in the power consumption of the device. TIVA is exceptionally effective for identifying resistive shorts and can operate at low bias voltages to avoid masking defects with parasitic leakage (Fig. 8). To avoid image saturation, the device under test (DUT) was biased with a constant current of 0.1 µA. Initial scans at 2.5X and 20X magnification confirmed concentrated “hits” in the USB2 Lane 4 area. High-resolution 50X scans, augmented with digital zoom, consolidated these hits to reveal the exact features involved. PHASE 5: CAD CORRELATION The final technical hurdle in nondestructive isolation is correlating optical hits with the physical design. This is achieved through electronic design automation (EDA) or CAD tools. By overlaying TIVA images onto the layout viewer, the FA engineer can trace the failing signal from the package solder balls down to the C4 bumps and into the silicon IP. For the D+ line, the correlation pinpointed the damage precisely at the D1 and D2 ESD protection diodes. For the D– line, hits were concentrated at specific metal layer overlays and pads. This step effectively concluded the detective work, providing a high-confidence ROI for destructive analysis. PHYSICAL ROOT CAUSE ANALYSIS (PFA) To validate the FIFA findings, the device underwent physical failure analysis (PFA). This involved a destructive layer-by-layer delayering process using parallel polishing to observe the physical manifestation of the electrical signature. The physical findings were conclusive and matched the parametric data: 1. Top Layers: Metal layer 9 appeared clean, with no visible delamination or gross thermal damage, consistent with the adiabatic nature of ESD. 2. Deeper Interconnects: Upon reaching interconnect pad 9 and metal layer 8, significant anomalies were discovered. 3. The Smoking Gun: High-resolution microscopy revealed that the ESD event had caused metal lanes to melt and fuse laterally together at metal layer 8. This physical fusion contributed to the 3 Ω and 30 Ω resistive paths identified during the initial IV-curve tracing. The damage was observed starting metal layer 8, all the way to the ESD protection diode on the affected USB2 lanes (Fig. 9). Fig. 8 TIVA hit and CAD analysis.[2]
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